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Performing HDL Functional Simulation of LatticeMico32 Platforms
44
LatticeMico32 Hardware Developer User Guide
Preparing for HDL Functional
Simulation
The following sections describe the steps required to perform functional
simulation on a given platform.
1.
Create the Simulation Directory
.
Functional simulation is performed in a directory that is created under the
top-level directory, which is named Platform in this example.
<
path_to_toplevel_directory>
/Platform
components
soc
simulation
2.
Create the Testbench
.
A testbench is required to functionally verify a design. The example
testbench, shown in Figure 20 on page 44, instantiates Platform_vhdl, the
top-level module of the design.
Figure 20: Testbench File
`timescale 1 ns / 1 ns
`include "lm32_include.v"
module testbench;
event done;
// Inputs
reg clk_i;
reg reset_n;
// Outputs
wire [7:0] LEDPIO_OUT;
wire sramsram_wen;
wire [31:0] sramsram_data;
wire [22:0] sramsram_addr;
wire sramsram_csn;
wire [3:0] sramsram_be;
wire sramsram_oen;
wire uartSIN;
wire uartSOUT;
Platform_vhd Platform_u
(
.clk_i(clk_i),
.reset_n(reset_n),
.sramsram_wen(sramsram_wen),
.sramsram_data(sramsram_data),
.sramsram_addr(sramsram_addr),
.sramsram_csn(sramsram_csn),
.sramsram_be(sramsram_be),
.sramsram_oen(sramsram_oen),
.LEDPIO_OUT(LEDPIO_OUT),
.uartSIN(uartSIN),
.uartSOUT(uartSOUT),
);
