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Creating the Microprocessor Platform in MSB
LatticeMico32 Hardware Developer User Guide
33
Implementing Shared Bidirectional Bus
to Board
Some components in the microprocessor platform—such as the ASRAM, the
flash controller, and the SDRAM controller—have bidirectional data buses.
Tristates in the platform are used extensively to implement them. This section
gives some guidelines on handling tristates.
Implementing a Shared Board Bus in MSB
When you use an evaluation board issued by a vendor other than Lattice
Semiconductor, you might need to use tristates to implement a bidirectional
data bus between the board and LatticeMico32 microprocessor platform. A
shared bidirectional data bus reduces pin count and board traces.
If you select “Share External Ports” for the ASRAM and flash components in
the generated <
platform_name
>.v file in the Verilog flow, the shared bus
connection will have a fixed pattern similar to the following:
assign sramflashDATA = !sramsram_wen ? sramsram_data_out :
!flashsram_wen ? flashsram_data_out :
32'bZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ;
If you want to change that connection, you must manually modify the code in
the <
platform_name
>.v file in the ./<
platform_name
>/soc directory by adding
logic to the tristates so that multiple LatticeMico32 components can share this
bidirectional bus.
IF you want to modify the shared bidirectional data bus in certain platform
components in the VHDL, you must modify the verilog code to change the
tristate control. You can do this by either pulling the tristates outside of the
platform or making the changes within the platform. If you pull the tristates
Figure 14: Verilog Instantiation Template
platform1 platform1_u (
.clk_i(clk_i),
.reset_n(reset_n)
, .sramsram_csn(sramsram_csn) //
, .sramsram_be(sramsram_be) // [3:0]
, .flashsram_csn(flashsram_csn) //
, .flashsram_be(flashsram_be) // [3:0]
, .flashsram_byten(flashsram_byten) //
, .flashsram_wpn(flashsram_wpn) //
, .flashsram_rstn(flashsram_rstn) //
, .LEDPIO_OUT(LEDPIO_OUT) // [10-1:0]
, .uartSIN(uartSIN) //
, .uartSOUT(uartSOUT) //
, .sramflashOEN(sramflashOEN)
, .sramflashWEN(sramflashWEN)
, .sramflashADDR(sramflashADDR)// [24:0]
, .sramflashDATA(sramflashDATA)// [31:0]
);
