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SSD40NBT

H

ARDWARE

I

NTEGRATION

G

UIDE

V

ERSION

4.5

Americas: +1-800-492-2320 Option 2
Europe: +44-1628-858-940

Hong Kong: +852-2923-0610
www.lairdtech.com/wireless

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Содержание SSD40NBT

Страница 1: ...SSD40NBT HARDWARE INTEGRATION GUIDE VERSION 4 5 Americas 1 800 492 2320 Option 2 Europe 44 1628 858 940 Hong Kong 852 2923 0610 www lairdtech com wireless ...

Страница 2: ...ed the MSD40NBT schematic Updated Current Consumption numbers in the Specifications table Added series resistors information to the Integration Considerations section Added product image 1 8 01 03 12 Updated Specification table 1 9 02 08 12 Add pin note and power notes 1 10 02 17 12 Updated Transmit Power numbers in the Specs table 2 0 4 17 12 Add AS NZS Australia New Zealand certifications Change...

Страница 3: ...11 SDIO Timing Requirements 12 UART Timing Requirements 13 PCM Interface Timing 13 Control Signal Timing Requirements 18 Pin Definitions 19 SSD30AG and SSD40NBT Pin Comparison Table 22 Electrical Considerations 23 Integration Considerations 25 Mechanical Specifications 26 Mounting 27 Recommendations 28 RF Layout Design Guidelines 29 Regulatory 30 Certified Antennas 30 Documentation Requirements 31...

Страница 4: ...Hz portion of the frequency spectrum and are subject to Dynamic Frequency Selection requirements the SDC SSD40NBT fully conforms to applicable regulatory requirements In the event that specified types of radar are detected by the network infrastructure the SDC SSD40NBT fully conforms to commands from the infrastructure for radar avoidance The SDC SSD40NBTis a System in Package SiP Quad Flat pack N...

Страница 5: ...ate at distances less than 20 cm from the human body See Documentation Requirements for more information BLOCK DIAGRAM Figure 1 Block Diagram Note Transmitter frequencies for Wi Fi are 2412 2462 MHz and 5180 5805 MHz Transmitter frequencies for BT are 2402 2480 MHz Note BT functions on the AUX port and not on the Main port For Wi Fi and BT single antenna implementations the AUX port must be used I...

Страница 6: ...ndby refers to the radio operating in PM1 powersave mode 802 11a with BT in standby Transmit 282 mA 931 mW Receive 92 mA 304 mW Standby TBD 802 11b with BT in standby Transmit 314 mA 1036 mW Receive 92 mA 304 mW Standby TBD 802 11g with BT in standby Transmit 288 mA 950 mW Receive 92 mA 304 mW Standby TBD 802 11n 2 4 GHz with BT in standby Transmit 292 mA 964 mW Receive 92 mA 304 mW Standby TBD 80...

Страница 7: ...rted 802 11a OFDM 6 9 12 18 24 36 48 54 Mbps 802 11b DSSS CCK 1 2 5 5 11 Mbps 802 11g OFDM 6 9 12 18 24 36 48 54 Mbps 802 11n OFDM MCS 0 7 6 5 7 2 13 0 14 4 19 5 21 7 26 0 28 9 39 0 43 3 52 0 57 8 58 5 65 0 72 2 Mbps Modulation BPSK 1 6 6 5 7 2 and 9 Mbps QPSK 2 12 13 14 4 18 19 5 and 21 7 Mbps CCK 5 5 and 11 Mbps 16 QAM 24 26 28 9 36 39 and 43 3 Mbps 64 QAM 48 52 54 57 8 58 5 65 and 72 2 Mbps 802...

Страница 8: ...apping Transmit Power Note Transmit power varies according to individual country regulations All values nominal 2 dBm Note Laird 40 series radios support a single spatial stream and 20 MHz channels only 802 11a 6 Mbps 16 dBm 40 mW 54 Mbps 14 dBm 25 mW 802 11b 1 Mbps 17 dBm 50 mW 11 Mbps 16 dBm 40 mW 802 11g 6 Mbps 15 dBm 32 mW 54 Mbps 13 dBm 20mW 802 11n 2 4 GHz 6 5 Mbps MCS0 15 dBm 32 mW 65 Mbps ...

Страница 9: ...indows Mobile 6 1 Windows Mobile 6 0 Windows Mobile 5 0 Windows Embedded CE 7 0 Windows Embedded CE 6 0 R3 Windows Embedded CE 6 0 R2 Windows Embedded CE 6 0 Windows Embedded CE 5 0 Linux 2 6 x 3 x x kernel Security Standards Wireless Equivalent Privacy WEP Wi Fi Protected Access WPA IEEE 802 11i WPA2 Encryption Wireless Equivalent Privacy WEP RC4 Algorithm Temporal Key Integrity Protocol TKIP RC4...

Страница 10: ...4 GHz RSS 210 BT 2 1 AS NZS AS NZS 4268 2008 A1 2010 RLAN device AS NZS 4268 2008 A1 2010 BT device Certifications Wi Fi Alliance 802 11a 802 11b 802 11g 802 11n WPA Enterprise WPA2 Enterprise Cisco Compatible Extensions Version 4 Bluetooth SIG Qualification Warranty Limited Lifetime All specifications are subject to change without notice Note The BCM4329 has an internal power on POR circuit The d...

Страница 11: ...VDD_IO DC Supply Voltage I O 1 8 3 3 V VIL Low Level Input Voltage VDDO 3 3V 0 8 V VIH High Level Input Voltage VDDO 3 3V 2 0 V VIL Low Level Input Voltage VDDO 1 8V 0 6 V VIH High Level Input Voltage VDDO 1 8V 1 1 V VOL Low Level Output Voltage 100 µA load 0 2 V VOH High Level Output Voltage 100 µA load VDDIO 0 2V V IIL Low Current Input 0 3 µA IIH High Current Input 0 3 µA IOL Low Current Output...

Страница 12: ... Requirements Symbol Parameter Min Typ Max Unit SDIO CLK All values are referred to minimum VIH and maximum VIL fPP Frequency Data Transfer mode 0 25 MHz fOD Frequency Identification mode 0 400 kHz tWL Clock low time 10 ns tWH Clock high time 10 ns tTLH Clock rise time 10 ns tTHL Clock low time 10 ns Inputs CMD DAT referenced to CLK tISU Input setup time 5 ns tIH Input hold time 5 ns Outputs CMD D...

Страница 13: ...MSB first Table 4 UART Timing Requirements Reference Description Min Typ Max Unit 1 Delay time BT_UART_CTS_N low to UART_TXD valid 24 Baudout cycles 2 Setup time BT_UART_CTS_N high before midpoint of stop bit 10 ns 3 Delay time midpoint of stop bit to BT_UART_RTS_N high 2 Baudout cycles PCM Interface Timing PCM Defaults Short Frame Sync Master Mode Short Frame Sync Slave Mode Long Frame Sync Maste...

Страница 14: ...it clock frequency 128 2048 kHz 2 PCM bit clock high time 128 ns 3 PCM bit clock low time 209 ns 4 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC high 50 ns 5 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC low 50 ns 6 Delay from BT_PCM_CLK rising edge to data valid on BT_PCM_OUT 50 ns 7 Setup time for BT_PCM_IN before BT_PCM_CLK falling edge 50 ns 8 Hold time for BT_PCM_IN after BT_PCM_CLK fal...

Страница 15: ... clock frequency 128 2048 kHz 2 PCM bit clock high time 209 ns 3 PCM bit clock low time 209 ns 4 Setup time for BT_PCM_SYNC before falling edge of BT_PCM_BCLK 50 ns 5 Hold time for BT_PCM_SYNC after falling edge of BT_PCM_CLK 10 ns 6 Hold time of BT_PCM_OUT after BT_PCM_CLK falling time 175 ns 7 Setup time for BT_PCM_IN before BT_PCM_CLK falling edge 50 ns 8 Hold time for BT_PCM_IN after BT_PCM_CL...

Страница 16: ...28 2048 kHz 2 PCM bit clock high time 209 ns 3 PCM bit clock low time 209 ns 4 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC high during first bit time 50 ns 5 Delay from BT_PCM_CLK rising edge to BT_PCM_SYNC low during third bit time 50 ns 6 Delay from BT_PCM_CLK rising edge to data valid on BT_PCM_OUT 50 ns 7 Setup time for BT_PCM_IN before BT_PCM_CLK falling edge 50 ns 8 Hold time for BT_PCM...

Страница 17: ...ge of BT_PCM_CLK during first bit time 50 ns 5 Hold time for BT_PCM_SYNC after falling edge of BT_PCM_CLK during second bit period Note BT_PCM_SYNC may go low any time from second bit period to last bit period 10 ns 6 Delay from rising edge of BT_PCM_CLK or BT_PCM_SYNC whichever is later to data valid for first bit on BT_PCM_OUT 50 ns 7 Hold time of BT_PCM_OUT after BT_PCM_CLK falling edge 175 ns ...

Страница 18: ...Timing Requirements Figure 4 displays Control Signal timing Figure 8 Control Signal Timing WLAN ON Bluetooth ON Note This radio has an integrated power on reset circuit that resets all circuits to a known power on state Individual resets can also be driven by BT_RST_N or SYS_RST_N an active low external reset signal which can be used to externally force the device into a power on reset state ...

Страница 19: ...to antenna or antenna connector IMPORTANT BT functions on the Auxiliary AUX port and not on the Main port For Wi Fi and BT single antenna implementations the AUX port must be used 6 GND Ground 7 GND Ground 8 GND Ground 9 GND Ground 10 ANT_1 I O Antenna 1 Main 50 ohm coplanar wave guide to antenna or antenna connector IMPORTANT BT functions on the AUX port and not on the Main port For Wi Fi and BT ...

Страница 20: ...n awake Deasserted Host device may sleep when sleep criteria are met The polarity of this signal is software configurable and can be asserted high or low Note The default is low but this is only applicable for specific Bluetooth Sleep mode settings By default the radio has No Sleep Mode Set 22 RSVD O VDDIO Bluetooth LED Activity Indicator active high 23 VDD3_3 3 3V Power 24 GND Ground 25 BT_UART_C...

Страница 21: ...e See Integration Considerations for additional integration information 39 GND Ground 40 SDIO_CLK I VDDIO SDIO Clock 25MHz max Note See Integration Considerations for additional integration information 41 GND Ground 42 SDIO_DATA_1 I O VDDIO SDIO Data 1 Note See Integration Considerations for additional integration information 43 SDIO_DATA_3 I O VDDIO SDIO Data 3 44 SDIO_DATA_2 I O VDDIO SDIO Data ...

Страница 22: ...ablished with the radio The host SDIO controller must re establish communication with the radio by reloading the radio firmware after a power on or a reset SSD30AG and SSD40NBT Pin Comparison Table SSD30AG SSD40NBT SSD30AG SSD40NBT Pin Pin Name Pin Name Pin Pin Name Pin Name 1 GND GND 29 RSVD BT_PCM_SYNC 2 GND GND 30 RSVD BT_PCM_IN 3 GND GND 31 RSVD BT_PCM_CLK 4 GND GND 32 VDDIO VDDIO 5 ANT_2 ANT_...

Страница 23: ...r the MSD40NBT a PCB module based on the SSD40NBT Laird provides this for your reference only to aid you in integrating the SSD40NBT into your device Note The full MSD40NBT schematic is located in Appendix A Schematic Figure 9 Recommended circuit for SYS_RST_L Note In the reset circuit the diode is placed in parallel with the resistor to ensure the capacitor is discharged quickly when a power drop...

Страница 24: ...e version 4 5 Americas 1 800 492 2320 Option 2 Europe 44 1628 858 940 Hong Kong 852 2923 0610 www lairdtech com wireless 24 Laird Technologies Note The 0 ohm resistors are optional and could be replaced by a chip ferrite bead if desired ...

Страница 25: ... of a drive strength then bus ringing may result Series resistors can reduce this ringing on the I O lines Adding 27 56 ohms of series resistance on the SDIO bus will reduce sharp transitional edges which may reduce EMI Having the series resistors in the PCB layout allows for design flexibility If they are later found to be unnecessary zero 0 ohm jumpers may be used in their place The following ar...

Страница 26: ...may be left floating because there is a 10 K ohm pull up resistor on this line inside the SSD40NBT SiP If the BT_RST_L is coming from a GPIO from the host processor then it may be easier although not necessary to assert a HIGH on this line rather than making it an input MECHANICAL SPECIFICATIONS Pins Dimensions 1 1 305 mm x 502 2 3 4 6 7 8 9 11 12 13 14 15 16 17 18 24 39 41 46 1 102 mm x 502 5 10 ...

Страница 27: ...is controlled by the Solder Mask layer Mounting Laird specializes in the design and manufacturing of Wi Fi radio modules and cards Although we understand that every system is different our expertise does not extend to the system level Because of this we can provide only integration guidelines and not individual design reviews and approvals The SDC SSD40NBT is a Quad Flat pack with No Leads QFN Sys...

Страница 28: ...nsure a flat SIP installation Solder Paste Type No Clean as the soldered part to board clearance will not allow for adequate post solder cleaning Rework is technically challenging due to parts on the SIP reflowing at the same temperature needed for rework The SDC SSD40NBT cannot be lifted by the shield during rework As such removal of part for rework is not recommended Reflow without removal has b...

Страница 29: ...ny parts or run any high speed digital lines below the radio If there are other radios or transmitters located on the device such as a Bluetooth radio place the devices as far apart from each other as possible Ensure that there is the maximum allowable spacing separating the antenna connectors on the Laird radio from the antenna In addition do not place antennas directly above or directly below th...

Страница 30: ... 6 dBi not used during testing Maximum 5 GHz Gain 5 dBi Tested and Certified 5 GHz Transmit Power TBD HUBER SUHNER SOA 2459 360 5 0 V_C Form Factor Whip Type Monopole Maximum 2 4 GHz Gain 3dBi Maximum 5 GHz Gain 6 5dBi Tested and Certified 2 4 GHz Transmit Power TBD Tested and Certified 5 GHz Transmit Power TBD Note If the formal test reports for the SDC SSD40NBTshow that transmit power was decrea...

Страница 31: ... the SDC SSD40NBT is integrated Federal Communication Commission Interference Statement This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency...

Страница 32: ...d for use with this device Le présent émetteur radio IC ID 6616A SDCSSD40L a été approuvé par Industrie Canada pour fonctionner avec les types d antenne énumérés ci dessous et ayant un gain admissible maximal et l impédance requise pour chaque type d antenne Les types d antenne non inclus dans cette liste ou dont le gain est supérieur au gain maximal indiqué sont strictement interdits pour l explo...

Страница 33: ...chnical requirements EN 301 489 17 V1 2 1 2002 08 Electromagnetic compatibility and Radio spectrum Matters ERM ElectroMagnetic Compatibility EMC standard for radio equipment and services Part 17 Specific conditions for 2 4 GHz wideband transmission systems and 5 GHz high performance RLAN equipment EN 301 893 Electromagnetic compatibility and Radio spectrum Matters ERM Broadband Radio Access Networ...

Страница 34: ... présente nom du fabricant déclare que l appareil type d appareil est conforme aux exigences essentielles et aux autres dispositions pertinentes de la directive 1999 5 CE Italiano Italian Con la presente nome del costruttore dichiara che questo tipo di apparecchio è conforme ai requisiti essenziali ed alle altre disposizioni pertinenti stabilite dalla direttiva 1999 5 CE Latviski Latvian Ar šo nam...

Страница 35: ...mi določili direktive 1999 5 ES Slovensky Slovak Meno výrobcu týmto vyhlasuje že typ zariadenia spĺňa základné požiadavky a všetky príslušné ustanovenia Smernice 1999 5 ES Suomi Finnish Valmistaja manufacturer vakuuttaa täten että type of equipment laitteen tyyppimerkintä tyyppinen laite on direktiivin 1999 5 EY oleellisten vaatimusten ja sitä koskevien direktiivin muiden ehtojen mukainen Svenska ...

Страница 36: ... Corporation B012854 https www bluetooth org tpg QLI_viewQDL cfm qid 12854 Assumptions This procedure assumes that the member is simply combining two subsystems to create a new design without any modification to the existing qualified subsystems This is achieved by using the listing interface on the Bluetooth SIG website Figure 12 shows the basic subsystem combination of a controller and host subs...

Страница 37: ...aration IDs of each subsystem used in the End Product design You can then select your pre paid Declaration ID from the drop down menu or go to the Purchase Declaration ID page please note that unless the Declaration ID is pre paid or purchased with a credit card it will not be possible to proceed until the SIG invoice is paid Once all the relevant sections of step 1 are complete complete steps 2 3...

Страница 38: ... is a PCB module that is based on the SDC SSD40NBT the following SDC MSD40NBT schematic may be used as a reference Figure 13 MSD40NBT Schematic Note By default R1 is populated and R2 is not populated on the MSD40NBT which connects VDDIO to the 3 3V rail If a 1 8V VDDIO is desired R2 is populated instead of R1 allowing a voltage other than 3 3V such as 1 8V to be applied to VDDIO through pin 21 of ...

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