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User Guide
CP3004-SA
3.3.7 Board Interrupt Configuration Register (BICFG)
The Board Interrupt Configuration Register holds a series of bits defining the interrupt routing.
Table 30: Board Interrupt Configuration Register (BICFG)
ADDRESS
0x286
BIT
7
6
5
4
3
2
1
0
NAME
UICF
CFICF
CEICF
CDICF
Reserved
WICF
ACCESS
R/W
R/W
R/W
R/W
R
R/W
RESET
1
0
0
0
00
00
BITFIELD
DESCRIPTION
7
UICF
UART IRQ3 and IRQ4 interrupt configuration:
0 = IRQ3 and IRQ4 interrupt disabled
1 = IRQ3 and IRQ4 interrupt enabled
6
CFICF
CPCI fail signal interrupt configuration (FAL signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
5
CEICF
CPCI enumeration signal interrupt configuration (ENUM signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
4
CDICF
CPCI derate signal interrupt configuration (DEG signal):
0 = IRQ5 disabled
1 = IRQ5 enabled
1 - 0
WICF
Watchdog interrupt configuration:
00 = Disabled
01 = IRQ5
10 = Reserved
11 = Reserved