D R A F T — F O R I N
T E R N A L U S E O N L Y
39
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User Guide
CP3004-SA
Note:
The pins for the GPIO interface (pins B17, B10, B7, C14, C13, C11, D18, and D10) tolerate
only 3.3 V signaling and their inputs (driven by the rear I/O module) have internal pull-up
resistors.
VGA Interface
VGA signals are available either on the front VGA connector, J4, or on the rear I/O interface due to the
implemented switch on the CP3004-SA. Switching over from front to rear I/O or vice versa is effected
using the uEFI BIOS.
Note:
On the rear I/O, the CP3004-SA provides 150
Ω
termination resistors for the red, green
and blue VGA signals. Thus, further 150
Ω
termination resistors are necessary on the rear
I/O module to reach the required 75
Ω
termination for the VGA connection.
Table 17: VGA Signal Description
PIN on J2
SIGNAL
FUNCTION
DRIVEN BY
SIGNALING VOLTAGE
C10
VGA_RED
VGA analog red signal
CP3004-SA
Analog
C6
VGA_GREEN
VGA analog green signal
CP3004-SA
Analog
C8
VGA_BLUE
VGA analog blue signal
CP3004-SA
Analog
C9
VGA_HSYNC
VGA horizontal synchronization signal
CP3004-SA
LVTTL (3.3 V)
C5
VGA_VSYNC
VGA vertical synchronization signal
CP3004-SA
LVTTL (3.3 V)
C4
VGA_DDC_CLK
Monitor control clock signal
CP3004-SA
TTL (5 V)
C7
VGA_DDC_DATA
Monitor control data signal
Bidirectional
TTL (5 V)