KDC-C715/Y
4
Pin No
Name
I/O
Processing, Operation
41
DATAC
O
Data output to H/U.
42
HCLK
I/O
H:Clock input. L:Clock output.
43
REQC
O
Communication request to H/U.
44
CHMUTE
O
L:Muting ON.
45
TSO
O
Text data output.
46
TSI
I
Text data input.
47
TSCK
O
Text clock output.
48
Å`
55 A0
Å`
7
O
S-RAM address setting.
56
Å`
63 D0
Å`
7
I/O
S-RAM data input/output.
64
Å`
68 A8
Å`
12
O
S-RAM address setting.
69
Å`
71 A13
Å`
15
O
S-RAM enable control.
72
VSS
GND.
73,74 A16,17
O
S-RAM enable control.
75
RAMOK
O
H:OK.
76
ELVADJ
I
L:Adjustment mode.
77
RD
O
S-RAM read control.
78
WR
O
S-RAM write control.
79
WAIT
I
Wait during S-RAM access.
80
ASTB
O
NC.
81
VDD
Power supply connection.
82
RAMTEST
I
H:S-RAM check mode.
83
REQH
I
Communication request from H/U.
84
SP/LO+
O
Spindle/ control.
85
SP/LO-
O
Spindle/Loading-
control.
86
ELV+
O
Mechanism UP/DOWN control.
87
ELV-
O
Mechamism UP/DOWN control.
88
SIM1
I
L:Text. H:No text.
89
SEARCH
O
H:Play. L:Search.
90,91 TEST1,2
I
L:Normal. H:Test.
92
8V/7V
O
H:7V. L:8V(Servo power supply).
93
SLG
I
H:+3dB. L:0dB(Sled gain).
94
TEST/VPP
I
L:Flash ROM program mode OFF.
95
SRVSEL
I
H:Servo mode.
96
SLNSA
I
L:Sled non-sensible area ON.
97
SDA
I/O
EEPROM data input/output.
98
SCL
O
EEPROM clock output.
99
PON
O
L:Power ON.
100
ARMSW
I
H:Arm switch ON.
MICROCOMPUTER’S TERMINAL DESCRIPTION
