C-7
The minimum conversion delay for Logical Counters 0, 1, and 2 is two
clock tics and for Logical Counters 3 and 4 is four clock tics. However,
the minimum usable conversion delay depends on the data acquisition
mode, the speed of the computer, and the gain and A/D conversion speed
of the data acquisition board. The maximum sustainable data acquisition
rate decreases with gain on boards with programmable gain. You should
perform empirical tests with your specific hardware setup to determine
the minimum practical conversion delay.
A/D Data Lost
The DAS-8 does not provide hardware monitoring of A/D data overruns.
You must determine empirically that the required conversion delay is
supported by your system. The easiest way to check is by inserting a
known periodic signal into an A/D channel and picking the smallest
conversion delay required. Use the time measurement cursors on the
Digital Storage Oscilloscope in the LearnDriverLINX facility in the
DriverLINX program to measure the period of the recorded waveform. If
the selected conversion delay is too small, the measured period of the
input signal will decrease. If this happens, increase the conversion delay
until the measured period matches the input period.
Analog Output Subsystem
The DAS-8/AO boards contain two channels of multiplying 12-bit D/A
converters. The outputs are labeled DAC 9 OUT [20] and DAC 1 OUT [1]
and are located on the D-type male connector that projects through the
rear panel of the computer.
Analog Output Initialization
Initialization of the Analog Output subsystem loads a value into both D/A
channels to force the output voltage to zero.
External Triggering
See the External Triggering section under the Analog Input Subsystem.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
