C-4
DriverLINX Implementation Notes
Three tests are performed every time the analog input subsystem is
initialized. First, DriverLINX determines if Logical Counter 3 is available
by testing if physical counter 2 can clock physical counter 1, Second, the
presence of Logical Counter 4 is detected by testing if physical counter 2
clocks physical counter 0. Third, DriverLINX determines if Logical
Counters 2, 3, or 4 are connected to the INTERRUPT INPUT [24] line.
The first counter that clocks this input stops the test. All these tests may
fail to detect a valid connection if the gate inputs of any counter are held
low during testing.
External Triggering
Applications may require that the start of a data-acquisition task be
synchronous with the occurrence of an external signal. Data-acquisition
devices commonly support this requirement by providing an input line for
a TTL-level signal that will start, or trigger, the data-acquisition process
on a specified state change of the signal line. Once data collection starts,
further transitions on the external trigger are usually ignored.
The DAS-8 hardware does not support external triggering as defined
above. However, you can obtain almost the same results using one of two
techniques. A hardware trigger can be implemented by using the gate
input of the appropriate clock counter. Holding the gate low will inhibit
the clock from counting. An active high level will start the clock. Note
that pulling the line low during the counting will suspend the counting
operation again unlike the preceding definition of an external trigger.
When using this technique, you do not need to modify the DriverLINX
Service Request because DriverLINX cannot control or detect the gate
inputs to the DAS-8 counters.
The second technique to implement an external trigger uses a Digital Start
Event. The DriverLINX Service Request can specify that data-acquisition
starts when one or more digital input lines change value. DriverLINX
supports this technique only on the 4-bit digital input port (digital Logical
Channel 0). External triggering using this technique requires software
polling so that data hold time for a trigger must be at least 3ms on a
10MHz AT, to at least 20ms on a 4.77MHz XT.
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