
11
Table 1
Maximum test lead resistance (Model 2750)
Figure 2
Low-ohms measurements using 4-wire method
Voltage measurements
As previously explained, path resistance can adversely affect “
). Series path resistance can also cause loading problems for DC voltage measurements
on the 100V, 10V, and 10mV ranges when the 10M
Ω
input divider is enabled.
High signal path resistance can also adversely affect AC voltage measurements on the 100V
range above 1kHz.
Range
Ω
Ω
Ω
Ω
2
Ω
Ω
Ω
Ω
4
Ω
Ω
Ω
Ω
4 Dry Circuit
R
LEAD
R
DUT
R
LEAD
R
DUT
R
LEAD
R
DUT
1
Ω
NA
NA
0
Ω
1.2
Ω
Overflow
Overflow
1
0Ω
0
Ω
2
Ω
0
Ω
7
Ω
3
Ω
12
Ω
V
SHI
-
V
SLO
V
I
TEST
V
M
Input Hi
Input Lo
2750 DMM with 7710 card
Sense Hi
Sense Lo
R
DUT
=
V
M
I
TEST
V
SHI
V
SLO
R
DUT
I
TEST
I
TEST
V
M
=
Virtually no current flows in the high-impedance sense circuit due to
the high impedance of the voltmeter (V
M
). Therefore, the voltage
drops across Channel 11 and test leads 1 and 4 are negligible and
can be ignored.
The voltage drops across Channel 1 Hi (R
CH1Hi
) and test lead 2
(R
LEAD2
) are not measured by the voltmeter (V
M
).
Assumptions:
where: V
M
is the voltage measured by the 2750.
I
TEST
is constant current sourced by the 2750 to the DUT.
V
SHI
=
I
TEST
×
(R
DUT
+
R
LEAD3
+
R
CH1Lo
)
V
SLO
=
I
TEST
×
(R
LEAD3
+
R
CH1Lo
)
V
SHI
-
V
SLO
= I
TEST
×
[
(R
DUT
+
R
LEAD3
+
R
CH1Lo
) -
(R
LEAD3
+
R
CH1Lo
)]
= I
TEST
×
R
DUT
= V
M
Ch11 Hi
R
CH11Hi
Ch1 Hi
Ch1 Lo
Ch11 Lo
R
LEAD1
R
LEAD2
R
LEAD3
R
LEAD4
R
CH1Hi
R
CH11Lo
R
CH1Lo
Topics
Topics
Topics
Содержание 7710
Страница 2: ......