JVC RX-DV3SL, Руководство по обслуживанию

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RX-DV3SL
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1. Pin layout
AK4527BVQP (IC601) : A/D,D/A converter
Top View
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Symbol
SDOS
OSKS
MIS
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
D,AUX
DFS
DEMI
DEMO
MCKO
DVDD
DVSS
PD
XTS
SDTO Source Select Pin (Note 1)
"L" : Internal ADC output, "H" : DAUX input
Control Mode Select Pin
"L" : 3-wire Serial, "H" : I
2
C Bus
Soft Mute Pin (Note 1), Connect to GND
When this pin goes to "H", soft mute cycle is initialized.
When returning to "L", the output mute releases.
Audio Serial Data Clock Pin
Input Channel Clock Pin
DAC1 Audio Serial Data Input Pin
DAC2 Audio Serial Data Input Pin
DAC3 Audio Serial Data Input Pin
Audio Serial Data Output Pin
Sub Audio Serial Data Input Pin, Connect to GND
Double Speed Sampling Mode Pin (Note 1)
"L" : Normal Speed, "H" : Double Speed
Connect to GND
No internal bonding.
Zero Input Detect Enable Pin, Connect to GND
"L" : mode 7 (disable) at parallel mode,
zero detect mode is selectable by DZFM2-0 bits at serial mode.
"H" : mode 0 (DZF is AND of all six channels)
Output Buffer Power supply Pin, 2.7V~5.5V
Digital Power Supply Pin, 4.5V~5.5V
De-emphasis Pin, 0V
Power-Down & Reset Pin
When "L", the AK4527B is powered-down and the control registers are reset to default
state. If the state of P/S or CAD0-1 changes, then the AK4527B must be reset by PDN.
Test Pin, Connect to GND
This pin should be connected to DVSS.
Function I/O
I
I
-
I
I/O
I
I
I
O
-
-
-
-
-
-
-
I
-
I
-
2. Pin function (1/2)
Description of major ICs