ADwin-Gold
USB / ENET, manual version 3.8, October 2005
27
CO1 Counter Add-On
ADwin
8.3 Operating Mode Impulse/Event Counting
External square-wave signals at the inputs A/CLK and B/DIR clock the counters
in this mode. With
CNT_SET
you either activate the mode for determining the
clock frequency and direction or the four edge evaluation.
The input CLR/LATCH (at high-signal) can be used to
Clear
– clear the counter (CLR)
Latch
– latch the counter values into latch register A (LATCH).
8.3.1 Clock and Direction
Fig. 21 – Block diagram of the CO1 add-on in the mode
"clock and direction"
Every positive edge of a square-wave signal at the CLK input (clock) is counted
(incremented or decremented) up to a maximum frequency of 20 MHz. The
direction is derived from a high signal (count up) or low signal (count down) at
the DIR input (direction); This signal can be static, for a fixed count direction,
or dynamic, for changing directions.
Programming example
Control Registers
32 bit Counter
32 bit Latch A
CLK
EN
CLR
CLK
ADwin-GOLD
bus
Data
Data
DIR
CLR
DIR
CNT
_CLE
A
R
CNT
_E
NA
B
L
E
CNT
_LA
T
CH
4k7
4k7
4k7
initialization ...
disable counters
clear counter(s)
external clock input (CLK)
activate mode "clock and direction"
input CLR/LATCH as CLR input
enable counter(s)
select single-ended inputs
CNT_ENABLE(1)
INIT:
CNT_ENABLE(0)
CNT_CLEAR(1)
CNT_MODE(0)
CNT_INPUTMODE(0)
CNT_SE_DIFF(0)
CNT_SET(1)
. . .
EVENT:
CNT_READLATCH(1)
. . .
CNT_LATCH(1)
current counter value to latch A
read out latch A
evaluate counter value in process
event loop ...
