REL0.2
Page 91 of 110
Zynq-Ult MPSoC (ZU11/17/19EG) SOM Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 19: JTAG Header Pin Assignment
Pin
No
Signal Name
Signal Type/
Termination
Description
1
NC
-
Not Connected
2
VCC_3V3
O, 3.3V Power
3V3 Supply Voltage.
3
GND
Power
Ground
4
JTAG_TMS
I, 3V3 LVCMOS/
49.9K PU
JTAG test mode select.
5
GND
Power
Ground
6
JTAG_TCK
I, 3V3 LVCMOS/
49.9K PU
JTAG test Clock
7
GND
Power
Ground
8
JTAG_TDO
O,3V3 LVCMOS/
49.9K PU
JTAG test data output.
9
GND
Power
Ground
10
JTAG_TDI
I, 3V3 LVCMOS
JTAG test data input
11
GND
Power
Ground
12
NC
-
Not Connected
13
GND
Power
Ground
14
JTAG_TRSTB
-
Not Connected