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i.MX8M SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.7.12
Power control & Management signals
SMARC V2.0 specification supports System and Power Management Signals.
For more details on Power & Management Signals pinouts on SMARC Edge connector, refer below table:
SMARC Pin No.
SMARC Edge
Signal Name
CPU Ball
Name/
Pin Number
Signal Type/
Termination
Description
P123
BOOT_SEL0#
NA
I, 1.8V CMOS
10K PU
Boot Media Select bit 0
P124
BOOT_SEL1#
NA
I, 1.8V CMOS
10K PU
Boot Media Select bit 1
P125
BOOT_SEL2#
NA
I, 1.8V CMOS
10K PU
Boot Media Select bit 2
P126
GPIO_RESET_OUT
(GPIO3_25)
SAI5_MCLK /
K4
I, 1.8V CMOS
RESOUT from CPU to all other
peripherals
P127
RESET_IN#
NA
I, 1.8V CMOS
100K PU
Hard RESET Input to SOM.
P128
ON_OFF_BUTTON
ONOFF/
W21
I, 1.8V CMOS
100K PU
Power ON /OFF Input to
SOM.
S150
VIN_PWR_BAD#
NA
I, 5V CMOS
10K PU
Power bad indication from
Carrier board. Module and
Carrier power supplies shall
not be enabled while this
signal is held low by the
Carrier.
S153
CARRIER_STBY#
NA
O, 1.8V CMOS
10K PU
Carrier power should be
enabled only after
CARRIER_STBY# goes High.
S154
CARRIER_PWR_ON
NA
O, 1.8V CMOS
10K PU
Carrier power should be
enabled only after
CARRIER_PWR_ON goes High
S155
FORCE_RECOV#
NA
I, 1.8V CMOS
10K PU
Low on this pin allows non-
protected segments of
Module boot device to be
rewritten / restored from an
external USB Host on Module
USB0. The Module USB0
operates in Client Mode
when in the Force Recovery
function is invoked.
S157
TEST_MODE_SELECT NA
I, 1.8V CMOS
10K PU
Only for Module vendor
specific use provided just a
10K Pull Up.
S147
VDD_3V0
NA
I, 3V Power
3V coin cell input for RTC.
P147, P148, P149,
P150, P151, P152,
P153. P154, P155, P156
VDD_IN
NA
I, 5V Power
Supply Voltage.