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RZ/G1H Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
The RZ/G1H Qseven carrier board supports STMPE811 resistive touch controller for this 2nd LVDS display port. This
resistive touch controller is connected to RZ/G1H CPU through I2C2 channel. The touch interrupt from this touch
controller is connected to GPIO0 (185
th
pin) of Qseven MXM connector which is RZ/G1H CPU’s GPIO pin “
GP0_24
”.
Since touch interrupt from both capacitive touch controller and resistive touch controller is connected to same GPIO
pin, either one touch interface only can be used at a time. The 4-wire resistive touch interface is available in the
resistive touch connector (J31). This connector is located at the bottom of the board as shown below.
Figure 24: LVDS Resistive Touch Connector
Table 23: Resistive Touch Connector Pin Out
Pin
No
Pin Name
Signal Name
Signal Type /
Termination
Description
1
Y1
TSC_Y1
I, Analog
Touch Left Signals
2
X2
TSC_X2
I, Analog
Touch Down Signals
3
Y2
TSC_Y2
I, Analog
Touch Right Signals
4
X1
TSC_X1
I, Analog
Touch Up Signals