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RZ/G1M/G1N Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
2.5
Serial Interface Features
2.5.1
Debug UART Port
The RZ/G1M/G1N Qseven carrier board supports debug interface through RZ/G1M/G1N CPU’s SCIF0 interface. This
SCIF0 signals from Qseven MXM connector is connected to UART to USB Convertor “FT232RQ” and to USB Micro AB
Connector (J3). This USB Micro AB Connector can be used for Debug purpose which is physically located at the top of
the board as shown below.
Figure 6: Debug UART
As per Qseven specification version 2.0, Debug UART interface and JTAG interface are shared the same pins in
Qseven Edge connector and so either one interface only can be used at a time. The required debug interface can be
selected by setting the 7
th
bit of Board configuration switch (SW2) to the appropriate position. Since RZ/G1M/G1N
Qseven SOM supports only Debug UART (SCIF0) on Qseven Edge connector by default, 7
th
bit of Board configuration
switch must be set to Debug UART.