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Page 38 of 89
RZ/G1M/G1N Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Table 7: PCIex4 Connector Pin Out
Pin
No
Pin Name
Signal Name
Signal Type/
Termination
Description
A1
PRSNT1#
PRSNT1#
O, 3.3V CMOS
Default Grounded.
B1
+12V
VCC_12V
O, 12V Power
12V Supply Voltage.
A2
+12V
VCC_12V
O, 12V Power
12V Supply Voltage.
B2
+12V
VCC_12V
O, 12V Power
12V Supply Voltage.
A3
+12V
VCC_12V
O, 12V Power
12V Supply Voltage.
B3
RSVD1
NC
-
NC, Reserved Pin.
A4
GND
GND
Power
Ground.
B4
GND
GND
Power
Ground.
A5
TCK
NC
-
NC.
B5
SMCLK
I2C5_SCL
O, 3.3V CMOS
SMB Clock.
A6
TDI
NC
-
NC.
B6
SMDAT
I2C5_SDA
IO, 3.3V CMOS SMB Data.
A7
TDO
NC
-
NC.
B7
GND
GND
Power
Ground.
A8
TMS
NC
-
NC.
B8
+3.3V
VPCIe_3V3
O, 3.3V Power
3.3V Supply Voltage.
A9
+3.3V
VPCIe_3V3
O, 3.3V Power
3.3V Supply Voltage.
B9
TRST#
NC
-
NC.
A10
+3.3V
VPCIe_3V3
O, 3.3V Power
3.3V Supply Voltage.
B10
3V3AUX
VAUX_3V3
O, 3.3V Power
3.3V Supply Voltage.
A11
PERST#
GPIO_PCIe_RST(GP7_1
9)
O, 3.3V CMOS
PCIe PERST#.
B11
WAKE#
GPIO_PCIe_WAKE(GP5
_11)
O, 3.3V CMOS
PCIe WAKE#.
A12
GND
GND
Power
Ground.
B12
RSVD2
NC
-
NC, Reserved Pin.
A13
PC
PC
O, DIFF
PCIe Clock positive.
B13
GND
GND
Power
Ground.
A14
PCIe0_CLK-
PCIe0_CLK-
O, DIFF
PCIe Clock negative.
B14
P
P
O, DIFF
PCIe Port 0 Transmit pair positive.
A15
GND
GND
Power
Ground.
B15
PCIE0_TX-
PCIE0_TX-
O, DIFF
PCIe Port 0 Transmit pair negative.
A16
P
P
O, DIFF
PCIe Port 0 Receive pair positive.
B16
GND
GND
Power
Ground.
A17
PCIE0_RX-
PCIE0_RX-
O, DIFF
PCIe Port 0 Receive pair negative.
B17
PRSNT2#
NC
-
NC.
A18
GND
GND
Power
Ground.
B18
GND
GND
Power
Ground.
A19
RSVD
NC
-
NC, Reserved Pin.
B19
P
NC
-
NC, PCIe Port 1 Transmit pair positive.