REL 1.0
Page 18 of 89
RZ/G1M/G1N Qseven Development Platform Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven MXM
Connector Pin
Name
Signal Name
Signal Type/
Termination
Description
45
SDIO_CMD
SD2_CMD(GP6_9)
IO,3.3VCMOS/
10K PU
SDHI2 command.
This pin is connected to SD/MMC
connector (J30).
46
SDIO_WP
SD2_WP(GP6_15)
O, 3.3V CMOS/
10K PU
SDHI2 Write Protect.
This pin is connected from SD/MMC
connector (J30).
47
SDIO_PWR#
SD1_PWR(GP1_16)
I, 3.3V CMOS/
10K PD
SD/MMC Interface Power Enable.
48
SDIO_DAT1
SD2_DAT1(GP6_11)
IO, 3.3V CMOS SD2 Data1.
This pin is connected to SD/MMC
connector (J30).
49
SDIO_DAT0
SD2_DAT0(GP6_10)
IO, 3.3V CMOS SD2 Data0.
This pin is connected to SD/MMC
connector (J30).
50
SDIO_DAT3
SD2_DAT3(GP6_13)
IO, 3.3V CMOS SD2 Data3.
This pin is connected to SD/MMC
connector (J30).
51
SDIO_DAT2
SD2_DAT2(GP6_12)
IO, 3.3V CMOS SD2 Data2.
This pin is connected to SD/MMC
connector (J30).
52
SDIO_DAT5
NA
-
NC in RZ/G1M/G1N Qseven SOM.
This pin is connected to SD/MMC
connector (J30) in carrier board.
53
SDIO_DAT4
NA
-
NC in RZ/G1M/G1N Qseven SOM.
This pin is connected to SD/MMC
connector (J30) in carrier board.
54
SDIO_DAT7
NA
-
NC in RZ/G1M/G1N Qseven SOM.
This pin is connected to SD/MMC
connector (J30) in carrier board.
55
SDIO_DAT6
NA
-
NC in RZ/G1M/G1N Qseven SOM.
This pin is connected to SD/MMC
connector (J30) in carrier board.
56
USB_DRIVE_VBUS USB0_PWEN(GP7_23
)
I, 3.3V CMOS
USB OTG Power enable.
57
GND
GND
Power
Ground.
58
GND
GND
Power
Ground.
59
HDA_SYNC/
I2S_WS
SSI_WS0129(GP2_1)
I, 3.3V CMOS
Audio transmit frame synchronization.
This pin is connected to I2S audio codec.
60
SMB_CLK/
GP1_I2C_CLK
I2C5_SCL
I, 3.3V OD
I2C5 clock.
This pin is connected to PCIe Clock buffer,
PCIex4 connector, Mini PCIe connector and
Expansion Connector3 (J14) 77
th
Pin.