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ISL91108IIA-EVZ/ISL91108IIN-EVZ Evaluation Board 

User Guide

Evaluation Board Features

• ISL91108 high efficiency buck-boost regulator
• Input voltage rating from 1.8V to 5.5V
• Resistor programmable output voltage on the 

ISL91108IIA-EVZ evaluation board

• Fixed 3.3V output voltage on the ISL91108IIN-EVZ 

evaluation board

• Up to 1.5A output current (PVIN = 3.0V, V

OUT

 = 3.3V)

• 2.5MHz switching frequency
• Jumper selectable EN (enabled/disabled)
• Jumper selectable MODE (auto-PFM/forced-PWM)
• Connectors, testpoints, and jumpers for easy evaluation

Required Equipment

• Power supply capable of delivering up to 5.5V and 4A
• Electronic load
• Multimeter to measure voltages and currents
• Oscilloscope

Testpoints, Connectors, and 

Jumpers

Quick Setup Guide

1. Install jumper on J3, shorting EN to VIN.
2. Install jumper on J4, shorting MODE to VIN.
3. Connect power supply to J1, with voltage setting between 

1.8V and 5.5V.

4. Connect electronic load to J2.
5. Place scope probes on VOUT testpoint, and other testpoints 

of interest.

6. Turn on the power supply.
7. Monitor the output voltage startup sequence on the 

scope. The waveforms will look similar to that shown in 
Figures 1 and 2.

8. Turn on the electronic load.
9. Measure the output voltage with the voltmeter. The voltage 

should regulate within data sheet spec limits.

10. To determine efficiency, measure input and output voltages 

at the Kelvin sense testpoints (S+ and S-) which are part of 
J1 and J2 headers. The bench power supply can be 
connected to the PVIN and GND headers on J1. The 
electronic load can be connected to the VOUT and GND 
headers on J2. Measure the input and output currents. 
Calculate efficiency based on these measurements. 

11. To test external sync, remove the jumper at J4, then apply 

an external clock between 2.75MHz and 3.25MHz on the 
MODE input (the center pin of header J4).

TABLE 1. DESCRIPTION OF TEST POINTS

TEST POINT(S)

DESCRIPTION

TP1

LX1 (Input side of power inductor)

TP2

LX2 (Output side of power inductor)

TP3

V

OUT

TABLE 2. DESCRIPTION OF CONNECTORS

CONNECTOR

DESCRIPTION

J1

Header for connecting input power. Includes S+ and S- 
sense lines.

J2

Header for connecting external load. Includes S+ and 
S- sense lines.

TABLE 3. DESCRIPTION OF JUMPERS

JUMPER

DESCRIPTION

J3

Jumper to select EN input logic state. Set EN = V

IN

 to 

enable device, or set EN = GND to disable device.

J4

Jumper to select MODE input logic state. Set 
MODE = V

IN

 to enable auto-PFM mode, or set 

MODE = GND to select forced PWM mode. 

To use external sync feature, remove this jumper and 
apply an external clock between 2.75MHz and 
3.25MHz on the center pin on the J4 header.

March 11, 2014
AN1903.1

Application Note 1903

Author: Sameer Dash

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

|

Copyright Intersil Americas LLC 2013, 2014. All Rights Reserved

Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.

All other trademarks mentioned are the property of their respective owners.

Содержание ISL91108IIA-EVZ

Страница 1: ...part of J1 and J2 headers The bench power supply can be connected to the PVIN and GND headers on J1 The electronic load can be connected to the VOUT and GND headers on J2 Measure the input and output currents Calculate efficiency based on these measurements 11 To test external sync remove the jumper at J4 then apply an external clock between 2 75MHz and 3 25MHz on the MODE input the center pin of ...

Страница 2: ...d output voltage as shown in Table 4 A precision resistor with 1 tolerance should be used FIGURE 1 ISL91108 START UP WITH VIN 2V and VOUT 3 3V LX1 2V DIV 2V DIV LX2 2V DIV VOUT 2V DIV EN VIN 2V VOUT 3 3V 400µs DIV IOUT 200mA FIGURE 2 ISL91108 START UP WITH VIN 4V and VOUT 3 3V LX1 2V DIV 2V DIV LX2 2V DIV VOUT 2V DIV EN VIN 4V VOUT 3 3V 400µs DIV IOUT 200mA TABLE 4 OUTPUT VOLTAGE PROGRAMMING DESIR...

Страница 3: ...Y 4 2 C2 C3 10µF 16V X5R 0603 Capacitor Ceramic GRM188R61C106MA73D Murata 5 2 C4 C5 22µF 10V X5R 0603 Capacitor Ceramic GRM188R61A226M Murata 6 1 C6 22pF 50V NP0 0402 Capacitor Generic ANY 7 1 C7 0 1µF 0402 Capacitor Generic ANY 8 1 R1 187kΩ 1 0402 Resistor Generic ANY 9 1 R2 60 4kΩ 1 0402 Resistor Generic ANY 10 2 R3 R4 1MΩ 5 0603 Resistor Generic ANY 11 2 J1 J2 HDR 6 HDR 6 Vert Pin Header 6 Pin ...

Страница 4: ...ower Inductor DFE322512C 4 6A 34mΩ TOKO 3 1 C1 330µF 7343 Capacitor Tantalum ANY 4 2 C2 C3 10µF 16V X5R 0603 Capacitor Ceramic GRM188R61C106MA73D Murata 5 2 C4 C5 22µF 10V X5R 0603 Capacitor Ceramic GRM188R61A226M Murata 6 1 C6 DNP 0402 ANY 7 1 C7 0 1µF 0402 Capacitor Generic ANY 8 1 R1 0Ω 0402 Resistor Generic ANY 9 1 R2 DNP 0402 ANY 10 2 R3 R4 1MΩ 5 0603 Resistor Generic ANY 11 2 J1 J2 HDR 6 HDR...

Страница 5: ...Application Note 1903 5 AN1903 1 March 11 2014 ISL91108 Evaluation Board Layout FIGURE 5 ISL91108 EVALUATION BOARD LAYOUT FIGURE 6 TOP LAYER ...

Страница 6: ...Application Note 1903 6 AN1903 1 March 11 2014 FIGURE 7 MID LAYER FIGURE 8 MID LAYER 2 ISL91108 Evaluation Board Layout Continued ...

Страница 7: ...tions at any time without notice Accordingly the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding For information regarding Intersil Corporation and its products see www intersil com AN1903 1 March 11 2014 FIGURE 9 BOTTOM LAYER ISL91108 Evaluation Board Layout Continued ...

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