Intel® Server Boards SE7320SP2 and SE7525GP2
Functional Architecture
Revision 4.0
21
REQ#/GNT# pairs. LPC DMA is handled through the use of the LDRQ# lines from peripherals
and special encoding on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes
are supported on the LPC interface. Channels 0–3 are 8 bit channels. Channels 5–7 are 16-bit
channels. Channel 4 is reserved as a generic bus master request.
The timer/counter block contains three counters that are equivalent in function to those found in
one, 82C54 programmable interval timer. These three counters are combined to provide the
system timer function, and speaker tone. The 14.31818-MHz oscillator input provides the clock
source for these three counters.
The Intel 6300ESB I/O controller provides an ISA-compatible programmable interrupt controller
(PIC) that incorporates the functionality of two 82C59 interrupt controllers. The two interrupt
controllers are cascaded so that 14 external and two internal interrupts are possible. In addition,
the Intel 6300ESB I/O controller supports a serial interrupt scheme. All of the registers in these
modules can be read and restored. This is required to save and restore the system state after
power has been removed and restored to the platform.
3.4.6
Advanced Programmable Interrupt Controller (APIC)
In addition to the standard ISA-compatible PIC described in the previous section, the Intel
®
6300ESB I/O controller incorporates the advanced programmable interrupt controller (APIC).
3.4.7
Universal Serial Bus (USB) Controller
The Intel
®
6300ESB I/O controller contains an
Enhanced Host Controller Interface Specification
for Universal Serial Bus, Revision 1.0
-compliant host controller that supports USB high-speed
signaling. High-speed USB 2.0 allows data transfers up to 480 Mb/s which is 40 times faster
than full-speed USB. The Intel 6300ESB I/O controller also contains four universal host
controller interface (UHCI) controllers that support USB full-speed and low-speed signaling. On
the Intel
®
Server Board SE7320SP2, the Intel 6300ESB I/O controller supports four USB 2.0
ports. All four ports are high-speed, full-speed, and low-speed capable. Intel 6300ESB I/O
controller port-routing logic determines whether a USB port is controlled by one of the UHCI
controllers or by the EHCI controller.
3.4.8 RTC
The Intel
®
6300ESB I/O controller contains the real-time clock with 256 bytes of battery-backed
RAM. The real-time clock performs two key functions: keeping track of the time of day and
storing system data, even when the system is powered down. The RTC operates on a 32.768
KHz crystal and a separate 3 V lithium battery. The RTC also supports two lockable memory
ranges. By setting bits in the configuration space, two 8-byte ranges can be locked to read and
write accesses. This prevents unauthorized reading of passwords or other system security
information. The RTC also supports a date alarm that allows for scheduling a wake-up event up
to 30 days in advance.
3.4.9 GPIO
Various general purpose inputs and outputs are provided for custom system design. The
number of inputs and outputs varies depending on the Intel
®
6300ESB I/O controller
configuration. All unused GPI pins must be pulled high or low, so that they are at a predefined
level and do not cause undue side effects.
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