Intel Pentium III Processor/840, Руководство пользователя, Страница: 32 / 151

3-8 Intel
®
Pentium
®
III Processor/840 Development Kit Manual
Theory of Operation
3.3.18 IDE Support
The evaluation board supports both a primary and secondary IDE interface through two 40-pin IDE
connectors. The connector labeled IDE1 (J10E1) is the primary interface and the connector labeled
IDE2 (J10F1) is the secondary interface.
3.3.19 Keyboard/Mouse
Keyboard and mouse support are provided by the SMSC Super I/O controller. The keyboard and
mouse connectors (J1P2) are PS/2-style, 6-pin stacked miniature DIN connectors. The top
connector is for the keyboard and the bottom connector is for the mouse.
3.3.20 POST Code Display
The evaluation board has an on-board POST code display. Data from any program that performs an
I/O write to 0080H is latched and displayed on the two LEDs (U10C1 and U11C1). During BIOS
startup, codes are posted to these LEDs, to indicate what the BIOS is doing. Application programs
can post their own data to these LEDs by writing to I/O address 0080H.
3.3.21 Clock Generation
The CK133W devices on the baseboard generate and distribute the clocks used by the entire
system.
3.3.21.1 System Clocks
The CK133W, clock synthesizer is the primary source of clock generation for most of the clocks on
the baseboard. The following clock groups are found on the Pentium
III
processor/840 evaluation
board.
Host 100 MHz/133 MHz
PCI 66 MHz
PCI 33 MHz
Memory DRCG - 300 MHz/400 MHz
AHA 66 MHz
USB 48 MHz
LPC 33 MHz
SIO 14 MHz
RTC 32.768 KHz
APIC 16.6 MHz
AC97 24.576 MHz