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Developer’s Manual 17
Introduction
1
1.1 About this Document
This manual is a reference for network processor development tools and is organized as follows:
•
Chapter 2, “Developer Workbench” - Describes the Workbench and its graphical user interface
(GUI).
•
Chapter 3, “Performance Monitoring Unit” - Describes the Performance Monitoring Unit
(PMU)
•
Chapter 4, “Assembler” - Describes how to run the Assembler.
•
Chapter 5, “Microengine C Compiler” - Describes how to run the Microengine C Compiler.
•
Chapter 6, “Linker” - Describes how to run the Linker.
•
Chapter 7, “Foreign Model Simulation Extensions” - Provides information on interfacing the
Network Processor to foreign models.
•
Chapter 8, “Transactor” - Describes the Transactor and its commands.
•
Chapter 9, “Simulator APIs” - Desribes the Simulation APIs.
•
Appendix A, “Transactor States” - Describes the Transactor internal states.
•
Appendix B, “Developer Workbench Shortcuts” - Contains a listing and description of
commonly used shortcuts.
•
Appendix C, “Intel XScale® Core Memory Bus Functional Model” - Describes the Intel
XScale

Bus Functional Model.
•
Appendix D, “PCI Bus Functional Model” - Describes the PCI Bus Functional Model.
•
Appendix E, “SPI4 Bus Functional Model” - Describes the SPI4 Bus Functional Model.
1.2 Intended Audience
The intended audience for this book is Developers and Systems Programmers.
1.3 Related Documents
Further information on the network processors is available in the following documents:
Intel

IXP2400/IXP2800 Network Processor Programmer’s Reference Manual —Contains detailed
programming information for designers.
Intel

IXP2800 Network Processor Datasheet —Contains summary information on the IXP2800
Network Processor including a functional description, signal descriptions, electrical specifications,
and mechanical specifications.