Volume 4: Base IA-32 Instruction Reference
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IRET/IRETD—Interrupt Return
Description
Returns program control from an exception or interrupt handler to a program or
procedure that was interrupted by an exception, an external interrupt or, a
software-generated interrupt, or returns from a nested task. IRET and IRETD are
mnemonics for the same opcode. The IRETD mnemonic (interrupt return double) is
intended for use when returning from an interrupt when using the 32-bit operand size;
however, most assemblers use the IRET mnemonic interchangeably for both operand
sizes.
In Real Address Mode, the IRET instruction preforms a far return to the interrupted
program or procedure. During this operation, the processor pops the return instruction
pointer, return code segment selector, and EFLAGS image from the stack to the EIP, CS,
and EFLAGS registers, respectively, and then resumes execution of the interrupted
program or procedure.
In Protected Mode, the action of the IRET instruction depends on the settings of the NT
(nested task) and VM flags in the EFLAGS register and the VM flag in the EFLAGS image
stored on the current stack. Depending on the setting of these flags, the processor
performs the following types of interrupt returns:
• Real Mode.
• Return from virtual-8086 mode.
• Return to virtual-8086 mode.
• Intra-privilege level return.
• Inter-privilege level return.
Return from nested task (task switch)
All forms of IRET result in an IA-32_Intercept(Inst,IRET) in the Itanium
System Environment.
If the NT flag (EFLAGS register) is cleared, the IRET instruction performs a far return
from the interrupt procedure, without a task switch. The code segment being returned
to must be equally or less privileged than the interrupt handler routine (as indicated by
the RPL field of the code segment selector popped from the stack). As with a
real-address mode interrupt return, the IRET instruction pops the return instruction
pointer, return code segment selector, and EFLAGS image from the stack to the EIP, CS,
and EFLAGS registers, respectively, and then resumes execution of the interrupted
program or procedure. If the return is to another privilege level, the IRET instruction
also pops the stack pointer and SS from the stack, before resuming program execution.
If the return is to virtual-8086 mode, the processor also pops the data segment
registers from the stack.
Opcode
Instruction
Description
CF
IRET
Interrupt return (16-bit operand size)
CF
IRETD
Interrupt return (32-bit operand size)
Содержание ITANIUM ARCHITECTURE
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Страница 269: ...4 262 Volume 4 Base IA 32 Instruction Reference LES Load Full Pointer See entry for LDS LES LFS LGS LSS ...
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Страница 273: ...4 266 Volume 4 Base IA 32 Instruction Reference LGS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 288: ...Volume 4 Base IA 32 Instruction Reference 4 281 LSS Load Full Pointer See entry for LDS LES LFS LGS LSS ...
Страница 352: ...Volume 4 Base IA 32 Instruction Reference 4 345 ROL ROR Rotate See entry for RCL RCR ROL ROR ...
Страница 368: ...Volume 4 Base IA 32 Instruction Reference 4 361 SHL SHR Shift Instructions See entry for SAL SAR SHL SHR ...
Страница 373: ...4 366 Volume 4 Base IA 32 Instruction Reference SIDT Store Interrupt Descriptor Table Register See entry for SGDT SIDT ...
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Страница 590: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 Index ...
Страница 591: ...Index Intel Itanium Architecture Software Developer s Manual Rev 2 3 ...
Страница 603: ...INDEX Index 12 Index for Volumes 1 2 3 and 4 ...
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