Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS VOLUME 3 REV 2.3, Руководство пользователя

Страница: 603 / 1898

Volume 2, Part 1: Processor Abstraction Layer 2:355
PAL_CACHE_PROT_INFO 38 Req. Static Both No Return instruction or data cache protection
information.
PAL_CACHE_SHARED_INFO 43 Opt. Static Both No Returns information on which logical processors
share caches.
PAL_CACHE_SUMMARY 4 Req. Static Both No Return a summary of the cache hierarchy.
PAL_MEM_ATTRIB 5 Req. Static Both No Return a list of supported memory attributes.
PAL_PREFETCH_VISIBILITY 41 Req. Static Both No Used in architected sequence to transition
pages from a cacheable, speculative attribute to
an uncacheable attribute. See
Section 4.4.11.2,
“Physical Addressing Attribute Transition –
Disabling Prefetch/Speculation and Removing
Cacheability” on page 2:90
.
PAL_PTCE_INFO 6 Req. Static Both No Return information needed for
ptc.e
instruction to purge entire TC.
PAL_VM_INFO 7 Req. Static Both No Return detailed information about virtual
memory features supported in the processor.
PAL_VM_PAGE_SIZE 34 Req. Static Both No Return virtual memory TC and hardware walker
page sizes supported in the processor.
PAL_VM_SUMMARY 8 Req. Static Both No Return summary information about virtual
memory features supported in the processor.
PAL_VM_TR_READ 261 Req. Stacked Phys. No Read contents of a translation register.
a. Calling this procedure may affect resources on multiple processors. Please refer to implementation-specific reference manuals
for details.
Table 11-50.PAL Processor Identification, Features, and Configuration Procedures
Procedure Idx Class Conv. Mode Buffer Description
PAL_BRAND_INFO 274 Opt. Stacked Both No Provides processor branding information.
PAL_BUS_GET_FEATURES 9 Req. Static Phys. No Return configurable processor bus interface
features and their current settings.
PAL_BUS_SET_FEATURES
a
10 Req. Static Phys. No Enable or disable configurable features in
processor bus interface.
PAL_DEBUG_INFO 11 Req. Static Both No Return the number of instruction and data
breakpoint registers.
PAL_FIXED_ADDR 12 Req. Static Both No Return the fixed component of a processor’s
directed address.
PAL_FREQ_BASE 13 Opt. Static Both No Return the frequency of the output clock for use
by the platform, if generated by the processor.
PAL_FREQ_RATIOS 14 Req. Static Both No Return ratio of processor, bus, and interval time
counter to processor input clock or output clock
for platform use, if generated by the processor.
PAL_GET_HW_POLICY 48 Opt. Static Both Dep. Get current hardware resource sharing policy.
PAL_LOGICAL_TO_PHYSICAL 42 Opt. Static Both No Return information on which logical processors
map to a physical processor package.
PAL_PERF_MON_INFO 15 Req. Static Both No Return the number and type of performance
monitors.
PAL_PLATFORM_ADDR
a
16 Req. Static Both No Specify processor interrupt block address and
I/O port space address.
PAL_PROC_GET_FEATURES 17 Req. Static Phys. No Return configurable processor features and
their current setting.
Table 11-49.PAL Cache and Memory Procedures (Continued)
Procedure Idx Class Conv. Mode Buffer Description