Intel 500 - DATASHEET REV 003, Техническое описание

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Introduction
8 Datasheet
1.1 Terminology
Term Definition
#
A “#” symbol after a signal name refers to an active low signal, indicating a
signal is in the active state when driven to a low level. For example, when
RESET# is low, a reset has been requested. Conversely, when NMI is high,
a nonmaskable interrupt has occurred. In the case of signals where the
name does not imply an active state but describes part of a binary
sequence (such as address or data), the “#” symbol implies that the signal
is inverted. For example, D[3:0] = “HLHL” refers to a hex ‘A’, and D[3:0]#
= “LHLH” also refers to a hex “A” (H= High logic level, L= Low logic level).
XXXX means that the specification or value is yet to be determined.
AGTL+
Advanced Gunning Transceiver Logic. Used to refer to Assisted GTL+
signaling technology on some Intel processors.
Front Side Bus
(FSB) Refers to the interface between the processor and system core logic (also
known as the chipset components).
Intel® 64
Technology
64-bit memory extensions to the IA-32 architecture.
Processor Core
Processor core die with integrated L1 and L2 cache. All AC timing and
signal integrity specifications are at the pads of the processor core.
Storage
Conditions
Refers to a non-operational state. The processor may be installed in a
platform, in a tray, or loose. Processors may be sealed in packaging or
exposed to free air. Under these conditions, processor lands should not be
connected to any supply voltages, have any I/Os biased or receive any
clocks. Upon exposure to “free air” (unsealed packaging or a device
removed from packaging material) the processor must be handled in
accordance with moisture sensitivity labeling (MSL) as indicated on the
packaging material.
V
CC
The processor core power supply.
V
SS
The processor ground.