© 2019 Infinite Electronics, Inc. Pasternack is a registered trademark of Infinite Electronics, Inc.
25
9:8
R/W
dsm_order
2
00-first order 01-second 10-third fb 11-third ff
13:10
R/W
dsm_quant_max
4’b0011
max value allowed out of ΔΣ modulator quantizer
limits are +7 to -8, typ ±3 or ±4
17:14
R/W
dsm_quant_min
4’b1100
min value allowed out of ΔΣ modulator quantizer
limits are +7 to -8, typ ±3 or ±4
7.21 Reg 13h Reserved
Bit
Type
Name
Default
Description
15:0
R/W
Reserved
0
Reserved
7.22 Reg 14h CW Sweep Control Register
Bit
Type
Name
Default
Description
0
R/W
clear_ovf_undf
0
asynchronous clear for ovf/undf flags
1
R/W
ramp_enable
0
Ramp En/rstb
1= enables the CW Ramp Function
2
R/W
ramp_trigg
0
Write always triggers ramps if bit <2> = 0, if bit
<2> = 1, Ramp will not trigger, bit <2> must be
reset to 0 first
3
R/W
ramp_repeat_en
0
Ramp Repeat Seq enable
1= enables autotrigger of ramps 0 = ramp_trigg
starts each ramp
4
R/W
ramp_startdir_dn
0
Ramp start direction
1= Start with Ramp Down 0= Start with Ramp Up
5
R/W
ramp_trig_ext_en
0
Enable hardware trigger on GPO3 pin
6
R/W
ramp_singlestep
0
Ramp single step, advances the ramp to the next
step, and holds frequency
7
R/W
ramp_singledir
0
Ramps in one direction only with hop to start at
end of ramp
7.23 Reg 15h CW Sweep Ramp Step Register
Bit
Type
Name
Default
Description
23:0
R/W
ramp_step
2048
Ramp Step size
