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Edition 2020-02-26
Published by
Infineon Technologies AG
81726 Munich, Germany
 

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 2022 Infineon Technologies AG

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Document reference

IFX-Z8F68163446

Important notice
The information given in this document shall in no

event be regarded as a guarantee of conditions or

characteristics (“Beschaffenheitsgarantie”).
With respect to any examples, hints or any typical

values stated herein and/or any information regarding

the application of the product, Infineon Technologies

hereby disclaims any and all warranties and liabilities

of any kind, including without limitation warranties of

non-infringement of intellectual property rights of any

third party.
In addition, any information given in this document is

subject to customer’s compliance with its obligations

stated in this document and any applicable legal

requirements, norms and standards concerning

customer’s products and any use of the product of

Infineon Technologies in customer’s applications.
The data contained in this document is exclusively

intended for technically trained staff. It is the

responsibility of customer’s technical departments to

evaluate the suitability of the product for the intended

application and the completeness of the product

information given in this document with respect to such

application.

Warnings
Due to technical requirements products may contain

dangerous substances. For information on the types

in question please contact your nearest Infineon

Technologies office.
Except as otherwise explicitly approved by Infineon

Technologies in a written document signed by

authorized representatives of Infineon Technologies,

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Содержание TLS820F3ELVxx

Страница 1: ...LS820F3ELVxx demoboard for the TLS820F3ELV33 and TLS820F3ELV50 from Infineon Technologies AG Please also refer to the corresponding datasheets Intended audience This document is intended for engineers who develop applications User manual Please read the sections Important notice and Warnings at the end of this document Rev 1 0 www infineon com OPTIREG linear 2020 02 26 ...

Страница 2: ...ssembly 5 2 2 Operating conditions 6 2 3 Configuration 7 2 3 1 EN selection 7 2 3 2 RADJ selection 8 2 3 3 Signal adaption 10 3 Schematic and layout 11 3 1 Schematic 11 3 2 Layout 12 4 Bill of materials 16 5 Restrictions 17 6 Revision history 18 Disclaimer 19 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 Table of contents User manual 2 Rev 1 0 2020 02 26 ...

Страница 3: ...le reset circuit to supervise the output voltage and delay the reset at power on with an adjustable lower reset threshold watchdog circuit to monitor a microcontroller shared external delay capacitor to set both reset timing and watchdog timing output current limitation thermal shutdown 1 2 TLS820F3ELV33 and TLS820F3ELV50 features Output voltage 5 V and 3 3 V 2 Current capability 200 mA Input volt...

Страница 4: ...mperature Shutdown EN Enable RO RADJ WINH WO Current Limitation WI D Reset Watchdog Generator Figure 1 Block diagram TLS820F3ELVxx OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 1 Introduction User manual 4 Rev 1 0 2020 02 26 ...

Страница 5: ...e One for the TLS820F3ELV33 and one for the TLS820F3ELV50 They differ only by the resistor divider values on the RADJ pin see Table 2 Figure 2 Assembly TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 2 Demoboard User manual 5 Rev 1 0 2020 02 26 ...

Страница 6: ... voltage VQ 0 3 7 V 3 Output current IQ 0 200 mA Limited by overcurrent protection Enable VEN 0 42 V Watchdog inhibit VWINH 0 3 7 V 3 Watchdog output VWO 0 3 7 V 3 Watchdog input VWI 0 3 7 V 3 Reset output VRO 0 3 7 V 3 Ground voltage VGND 0 0 V 1 TA 25 C 2 Symbols refer to the connectors of the demoboard 3 Absolute maximum rating OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F6816344...

Страница 7: ...o select the default reset thresholds 2 3 1 EN selection The EN pin can be connected to either GND or to VIN by placing a jumper as shown in Figure 3 The EN pin is always connected to the external banana plug If the jumper is placed then do not connect an external signal to EN Figure 3 EN jumper left EN to VIN right EN to GND OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 2 D...

Страница 8: ...ating the reset threshold Placing the jumper as shown in Figure 5 connects the RADJ to GND and sets the default reset thresholds as shown in the datasheet The jumper shorts resistor R7 and causes a small permanent current through R4 Figure 4 RADJ resistor divider schematic Table 2 RADJ resistor divider assembly Variant R4 R7 VRT lo TLS820F3ELV33 9 4 kΩ 4 7 kΩ 2 7 V TLS820F3ELV50 16 2 kΩ 4 7 kΩ 4 V...

Страница 9: ...Figure 5 RADJ jumper OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 2 Demoboard User manual 9 Rev 1 0 2020 02 26 ...

Страница 10: ...int indicates the probed signal For further information on the mapping between test points and signals see Figure 7 The GND clip of the probe can be attached to one of several ground hooks as shown in Figure 6 Figure 6 Testpoint and GND hook example OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 2 Demoboard User manual 10 Rev 1 0 2020 02 26 ...

Страница 11: ... resistors R4 and R7 depending on whether the TLS820F3ELV33 or TLS820F3ELV50 is mounted see Table 2 for details Not mounted parts are optional and marked with a red cross Figure 7 Schematic TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 3 Schematic and layout User manual 11 Rev 1 0 2020 02 26 ...

Страница 12: ...ver four layers offer better thermal characteristics The configuration on this demoboard is comparable to the 2s2p thermal interface situation Figure 8 Top layer and components TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 3 Schematic and layout User manual 12 Rev 1 0 2020 02 26 ...

Страница 13: ...Figure 9 Internal layer 1 TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 3 Schematic and layout User manual 13 Rev 1 0 2020 02 26 ...

Страница 14: ...Figure 10 Internal layer 2 TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 3 Schematic and layout User manual 14 Rev 1 0 2020 02 26 ...

Страница 15: ...Figure 11 Bottom layer TLS820F3ELV50 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 3 Schematic and layout User manual 15 Rev 1 0 2020 02 26 ...

Страница 16: ... points are not mentioned Table 2 shows the configuration for resistors R4 and R7 Table 3 Bill of materials TLS820F3ELV50 Part Value Package D1 US1B E3 61T DO 214 C2 47 μF 50 V n a C3 10 μF 50 V 1206 C4 100 nF 50 V 0603 C5 1 μF 16 V 0603 C7 10 nF 50 V 0603 R1 R5 R6 R9 0 Ω 0603 OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 4 Bill of materials User manual 16 Rev 1 0 2020 02 26...

Страница 17: ...product or finished appliance nor is it intended or authorized by Infineon to be integrated into end products The demoboard may not be used in any production system For further information please visit www infineon com OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 5 Restrictions User manual 17 Rev 1 0 2020 02 26 ...

Страница 18: ...6 Revision history Revision Date Changes 1 0 2020 02 26 Document created OPTIREG linear voltage regulator TLS820F3ELVxx demoboard Z8F68163446 6 Revision history User manual 18 Rev 1 0 2020 02 26 ...

Страница 19: ...ent is subject to customer s compliance with its obligations stated in this document and any applicable legal requirements norms and standards concerning customer s products and any use of the product of Infineon Technologies in customer s applications The data contained in this document is exclusively intended for technically trained staff It is the responsibility of customer s technical departme...

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