Quasi-resonant CoolSET design guide
ICE2QRxx65/80x
Design Guide
11
8 August 2011
1
Case 3
Case 2
Case 1
Up/down
counter
4
5 6
6
6 6
5
4 3
1
1
2
3 4
4
4 4
3
2 1
7
7 7
7
7 7
6
5 4
t
t
V
FB
V
FBR1
V
FBZH
V
FBZL
clock
T=48ms
1
Figure 6 Up/down counter operation
4.3.1.2
Switch-on Determination
In the system, turn-on of the power switch depends on the value of the up/down counter, the value of the
zero-crossing counter and the voltage at the ZC pin V
ZC
. Turn-on happens only when the value in the both
counters is the same and the voltage at the ZC is lower than the threshold
V
ZCCT
. For comparison of the
values from both counters, a digital comparator is used. Once these counters have the same value, the
comparator generates a signal which sets the on/off flip-flop, only when the voltage V
ZC
is lower than the
threshold
V
ZCCT
.
Another signal which may trigger the digital comparator is the output of a T
sMax
clock signal, which limits the
maximum off time to avoid the low-frequency operation.
During active burst mode operation, the digital comparator is disabled and no pulse will be generated.
4.3.2
Switch-off Determination
In the converter system, the primary current is sensed by an external shunt resistor, which is connected
between Current Sense pin and the common ground. The sensed voltage across the shunt resistor
V
CS
is
applied to an internal current measurement unit, and its output voltage
V
1
is compared with the feedback
voltage
V
FB
. Once the voltage
V
1
exceeds the voltage
V
FB
, the output flip-flop is reset. As a result, the main
power switch is switched off. The relationship between the
V
1
and the
V
CS
is described by:
PWM
PWM
G
V
V
V
CS
1
[7]
where G
PWM
=3.3, V
PWM
=0.7
To avoid mistriggering caused by the voltage spike across the shunt resistor after switch-on of the main
power switch, a 330ns leading edge blanking time (t
LEB
) is applied to the output of the comparator.
4.4
Active Burst Mode Operation
At very low load condition, the CoolSET enters active burst mode operation to minimize the input power.
Details about active burst mode operation are explained in the following paragraphs.
4.4.1
Entering Active Burst Mode Operation
For determination of entering active burst mode operation, three conditions apply:
