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Application Note 

13 of 23 

V 1.1  

                                                                                                                                                                                                                                                                     2020-11-09  

CoolGaN™ 600 V half-bridge evaluation platform featuring GaN 
EiceDRIVER™ 

  

Setup and use 

   

4.3

 

Input PWM generator connections and settings 

The PWM input is the logic command to the half-bridge output: when the PWM input is high, the half-bridge 
output V

sw

 is at its high state (connected to the V

in+

 bus). Conversely, when the PWM input command is at logic 

low, the half-bridge output V

sw

 is at 0 (-V

in

). The input is an MMCX coaxial connector terminated in 50 Ω. 

Recommended signal/pulse generator settings are fastest rise/fall time, low level of 0 V and high-level of 3.5 V. 
The pulse generator can be set to pulse or burst-mode for double-pulse testing, or continuous operation for 
buck or boost modes, within the constraints of the warnings given in sections 4 and 4.2.3. 

4.4

 

Measurement points 

The evaluation board has 6 test points for connecting an oscilloscope to look at various signals. The test points 
are either a through-hole pad-pair, or an MMCX connector. The pad-pairs have a letterscreen symbol that 
identifies which pads are signal and reference (common): The signal pad is designated by the ~ symbol, and the 
reference pad is designated by the 

 symbol. 

Table 2

 

 

Test Point Label  Description 
TP4 

PWM input – parallel to J1. For use in verifying the proper logic drive levels and timing 
into the 50 Ω termination. Typical levels here should be 0 – 3.5 V 

TP11 

PWM input signal to the Schmitt trigger input of the high-side driver IC (U1). The rising-
edge of this signal is delayed from TP4 by the deadtime circuit so it has an exponential 
risetime characteristic. Voltage level is standard 5 V AHCT logic level. 

TP21 

PWM input signal to the Schmitt trigger input of the low-side driver IC (U2). The rising-
edge of this signal is delayed from TP4 by the deadtime circuit so it has an exponential 
risetime characteristic. Voltage level is standard 5 V AHCT logic level. 

TP1 

High-side gate voltage: signal is the gate of Q1, reference is the Kelvin source of Q1. This 
test point is an MMCX connector and is designed to be directly connected to the input of a 
Tektronix IsoVue isolated probe. Note that the reference point (the barrel of TP1 MMCX 
connector) is essentially the output switch-node of the half-bridge so the common-mode 
voltage is a fast high-voltage signal – do not use a non-isolated probe on TP1 or 
damage will occur
. The common-mode voltage is 0-V

in+

, and the differential-mode 

measured signal at this point is typically in the range of -8 V to +4 V. 

TP2 

Low-side gate voltage: signal is the gate of Q2, reference is the Kelvin source of Q2. Since 
the reference is the Kelvin-source, there is some common-mode voltage bounce between 
this test point reference and “ground” (V

in-

 the reference point for TP3). See 

recommendations in section 4.1 

TP3 

This is the test-point to observe the half-bridge switch-node output. Since the bus voltage 
is typically in the range of 350 – 400 V, be sure to use a voltage probe with appropriate 
voltage rating. We recommend the Tektronix TPP0850 50X high-voltage 800 MHz probe 
with its short ground pin. TP3 diameter and spacing will accommodate this probe. 

4.5

 

Power-up and power-down sequencing 

The gate drivers are designed to keep V

GS

 below the turn-on threshold even if they are unpowered. Regardless, 

it is good practice to make sure the 5 volt power (and thus the gate drivers) is always applied before powering-
up the high voltage bus. Conversely, power-down the high-voltage bus before powering-down the 5 volt 
supply. Recommended current limit on the 5 volt lab supply is 300 mA, and on the high-voltage supply, it 
depends on the expected load power. For basic double-pulse testing, even to 35 A peak, the HV supply can be 

Содержание CoolGaN

Страница 1: ...of EiceDRIVER GaN gate drivers and isolated power supplies for the gate drivers along with input logic that provides adjustable deadtime Using an external inductor the board can be configured for buck...

Страница 2: ...mer 6 3 3 Gate drive circuit 7 3 4 Half bridge output circuit 8 4 Setup and use 9 4 1 Test equipment needed 9 4 2 Connections to the terminal block 9 4 2 1 Connections for double pulse testing 10 4 2...

Страница 3: ...range up to 450 V limited by the capacitor rating This half bridge can switch continuous currents of 12 A and peak currents of 35 A hard or soft switching Operating frequency can be up to several MHz...

Страница 4: ...it Deadtime Circuit Isolated Gate Drive Power Vin Vo Vin PWM 0V Evaluation Board 0 400 V DC Laboratory Power Supply Test Inductor 5 V DC Laboratory Power Supply 50 Pulse Generator Figure 2 Evaluation...

Страница 5: ...be set long enough that the high side always fully turns off before the low side turn on with some margin and vice versa A simple adjustable RCD delay circuit generates the deadtime Whenever U11 or U...

Страница 6: ...DC DC converter shown in Figure 5 It takes the 5 V input and provides two isolated 8 V outputs VDD1 VSS1 and VDD2 VSS2 A small transformer T1 provides low capacitance isolation and voltage scaling Th...

Страница 7: ...e gate RC network described in the datasheet consists of Rx4 Cx4 and Rx5 The small Schottky diode Dx5 provides a low impedance return path for faster gate turnoff effectively bypassing Rx4 Note that t...

Страница 8: ...wer supply Attention Normally the bus capacitor is discharged when the lab power supply is switched off But if the power connector is removed while the capacitor is charged not recommended the bus cap...

Страница 9: ...a conventional BNC connector you will need a BNC male to MMCX plug cable Fairview Microwave FMC0809315 or a BNC to MMCX adapter Oscilloscope for measurement Due to the fast transient voltage and curre...

Страница 10: ...external inductor is connected between Vsw and Vo terminals the circuit is configured as a buck converter If a PWM signal is applied to the PWM input the output voltage will be proportional to the in...

Страница 11: ...nductor 5 V DC Laboratory Power Supply 50 Pulse Generator DC Load Figure 9 Connecting the evaluation board in the buck topology Figure 10 shows example waveforms operating in ZVS buck mode at 1 5 MHz...

Страница 12: ...V to zero there is a large change in Crss and thus a significant charge injected into the gate approximately 3 nC This charge in a short time I dq dt results in a short current spike that pulls the ga...

Страница 13: ...this signal is delayed from TP4 by the deadtime circuit so it has an exponential risetime characteristic Voltage level is standard 5 V AHCT logic level TP1 High side gate voltage signal is the gate of...

Страница 14: ...e rising edge of PWM To verify and adjust deadtime connect a 5 V DC supply to the 5 V input on the eval board and connect a pulse generator to the PWM input J1 refer to section 4 3 Set the generator f...

Страница 15: ...ly the rising and falling edge deadtimes are set to the same value Turning the trimpots clockwise increases the deadtime Figure 13 Measuring deadtime on the falling edge of PWM 4 7 Test inductor recom...

Страница 16: ...zero reverse recovery characteristic Double pulse testing is typically done 1 burst at a time not continuously in order to keep power dissipation low even when testing to the voltage and current limit...

Страница 17: ...gh side transistor operating in 3rd quardrant conduction mode You can see the switch node voltage rises several volts above the bus during deadtime due to the effective diode drop across the high side...

Страница 18: ...form featuring GaN EiceDRIVER Complete schematic 5 Complete schematic Note Part numbers 1 9 are in the ouput power stage 1x part numbers belong to the high side gate drive 2x are low side gate drive a...

Страница 19: ...ng GaN EiceDRIVER PCB layout 6 PCB layout The evaluation board is 1 6 mm thick with 4 evenly spaced copper layers 35 m thick The layer stackup is depicted below Figure 16 Top layer copper layer with t...

Страница 20: ...11 09 CoolGaN 600 V half bridge evaluation platform featuring GaN EiceDRIVER PCB layout Figure 18 Lower middle copper layer with top and bottom component overlay Figure 19 Bottom copper layer with bot...

Страница 21: ...3 D14 D24 LED GREEN CLEAR 0805 SMD J1 CONN MMCX JACK STR 50 OHM SMD Q1 Q2 Infineon IGOT60R070D1 CoolGaN Transistor R1 R2 RES SMD 499K OHM 1 1W 2512 R11 R21 TRIMMER 1k OHM 0 125W SMD R12 R15 R22 R25 RE...

Страница 22: ...aN EiceDRIVER Revision history 8 Revision history Document version Date of release Description of changes V 1 0 2019 01 16 First release V 1 1 2020 11 09 Updates for version B of the driver IC updated...

Страница 23: ...intellectual property rights of any third party with respect to any and all information given in this application note The data contained in this document is exclusively intended for technically trai...

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