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TLE5012B
Interfaces
User’s Manual
34
Rev. 1.2, 2018-02
Safety Word
The safety word consists of the following bits:
Bit Types
The types of bits used in the registers are listed here:
UPD
[10]
Update-Register Access
0: Access to current values
1: Access to values in update buffer
ADDR
[9..4]
6-bit Address
ND
[3..0]
4-bit Number of Data Words (if bits set to 0000
B
, no safety word is provided)
Table 5-5
Structure of the Safety Word
Name
Bits
Description
STAT
1)
1) When an error occurs, the corresponding status bit in the safety word remains “low” until the STAT register (address 00
H
)
is read via SSC interface. Once the STAT register has been read, the safety word status bits will be “high” again.
Chip and Interface Status
[15]
Indication of chip reset or watchdog overflow (resets after readout) via SSC
0: Reset occurred
1: No reset
[14]
System error (e.g. overvoltage; undervoltage; V
DD
-, GND- off; ROM;...)
0: Error occurred (S_VR; S_DSPU; S_OV; S_XYOL: S_MAGOL; S_FUSE;
S_ROM; S_ADCT)
1: No error
[13]
Interface access error (access to wrong address; wrong lock)
0: Error occurred
1: No error
[12]
Invalid angle value (NO_GMR_A = 1; NO_GMR_XY = 1)
0: Angle value invalid
1: Angle value valid
RESP
[11..8]
Sensor number response indicator
The sensor number bit is pulled low and the other bits are high (one-cold
encoding, e.g. for the sensor -or slave- number “00” the RESP bits are
“1110”. For the sensor -or slave- number “10” the RESP bits are “1011”).
CRC
[7..0]
Cyclic Redundancy Check (CRC), which includes the STAT and RESP bits.
Table 5-6
Bit Types
Abbreviation
Function
Description
r
Read
Read-only registers
w
Write
Read and write registers
u
Update
Update buffer for this bit is present. If an update is issued and the Update-
Register Access bit (UPD in command word) is set, the immediate values are
stored in this update buffer simultaneously. This allows a snapshot of all
necessary system parameters at the same time.
Table 5-4
Structure of the Command Word
(cont’d)
Name
Bits
Description