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TC1784
FlexRay™ Protocol Controller (E-Ray)
User´s Manual
20-20
V1.1, 2011-05
E-Ray, V3.13
Customer Interface Time-out Counter Register (CUST3)
The Time-out Counter Register is realizing the time-out counter reload (startup) value for
the automatic delay scheme (not the time-out down counter itself).
Automatic Delayed Write Access to OBCR and IBCR
Write and read accesses to the Output Buffer Control Register (OBCR) can be
automatically stalled due to a ongoing transfer from the Message Buffer to the Output
Buffer. Also write and read accesses to the Input Buffer Control Register (IBCR) may be
automatically delayed due to a ongoing transfer from the Input Buffer to the Message
Buffer.
This delay scheme can be controlled (enabled or disabled) by CUST1.IEN and
CUST1.OEN. The maximum time to stall a write or read access is determined by a single
time-out counter preluded with the 32-bit value specified in the bit field CUST3.TO. If the
time-out counter counts down to zero before the transfer to/from the Message Buffer is
completed, the access (read or write) will be canceled and a service request will be
generated. A canceled read access provides a 0 value. A canceled write access does
not modify any bits in the OBCR or IBCR. In addition the bit CUST1.INT0 of the service
request status register will be set and must be reset by the host to disable the service
request line.
The read and write access to the Output Buffer Control Register (OBCR) may be
configured without automatic delay by clearing CUST1.OEN. Setting OBCR.REQ and
immediately afterwards reading or writing OBCR, e.g. to set OBCR.VIEW will lead to a
canceled read or write operation, e.g. OBCR.VIEW remains cleared, and an error is
signalled by a set EIR.IOBA. Besides canceling the erroneous read or write operation,
and setting the error bit, no further state change happens. So full operation is granted.
OBCR remains read and write inaccessible until the transfer of data from the Message
Buffer to the Output Buffer (MBF
⇒
OBF) is completed. During this time span all read and
CUST3
Customer Interface Timeout Counter (000C
H
)
Reset Value: 0000 0000
H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TO
rw
Field Bits
Type Description
TO
[31:0] rw
CIF Timeout Reload Value
The 32-bit down counter reload (start-up) value must be setup for
the automatic delay scheme.
Содержание TC1784
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