AL4042
Remote I/O module 16 DI
52
Mapping: Output Counter
Register
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
n
reserved
res.
res.
res.
res.
res.
res.
res.
DIS
n+1
reserved
res.
res.
res.
res.
res.
res.
res.
DIR
n+2
reserved
res.
res.
res.
res.
res.
res.
res.
RST
MC
OV
n+3
reserved
res.
res.
res.
res.
res.
res.
res.
RST
MC
UV
n+4
reserved
res.
res.
res.
res.
res.
res.
res.
RST
BC
OV
n+5
reserved
res.
res.
res.
res.
res.
res.
res.
RST
BC
UV
n+6
reserved
res.
res.
res.
res.
res.
res.
res.
RST
CT
Legend:
• DIS
Disable Counter: disable main c batch
counter
1 BIT
• 0x0: no action
• 0x1: disable main and batch counter
• DIR
Counter Direction: Set counting direction (valid
only for counter mode CTDIR)
1 BIT
• 0x0: up
• 0x1: down
• RST MC OV
Reset Main Counter Overflow: Reset counter
event overflow of the main counter
1 BIT
• 0x0: no action
• 0x1: Rest overflow event
• RST MC UV
Reset Main Counter Underflow: Reset counter
event underflow of the main counter
1 BIT
• 0x0: no action
• 0x1: Reset underflow event
• RST BC OV
Reset Batch Counter Overflow: Reset counter
event overflow of the batch counter
1 BIT
• 0x0: no action
• 0x1: Rest overflow event
• RST BC UV
Reset Batch Counter Underflow: Reset counter
event underflow of the batch counter
1 BIT
• 0x0: no action
• 0x1: Reset underflow event
• RST CT
Reset main counter and batch counter to initial
value
1 BIT
• 0x0: no action
• 0x1: reset main + batch counter and
counter events to overflow/underflow