Manual Number: 00650-144-1
Page 29
Programming
On the PCI-WDT50x card, the 8254 counters occupy the following addresses:
Base Address
Read/Write Counter 0
Base A1 Read/Write Counter 1
Base A2 Read/Write Counter 2
Base A3 Read/Write Counter Control Register
The counters are programmed by writing a control byte into the counter control register. The control
byte specifies the counter to be programmed, the counter mode, the type of read/write operation,
and the modulus. The control byte format is a follows:
7
B
6
B
5
B
4
B
3
B
2
B
1
B
0
B
1
C
S
0
C
S
1
W
R
0
W
R
2
M
1
M
0
M
D
C
B
SC0 and SC1: These bits select the counter that the control byte is destined for.
1
C
S
0
C
S
n
o
i
t
c
n
u
F
0
0
0
r
e
t
n
u
o
C
m
a
r
g
o
r
P
0
1
1
r
e
t
n
u
o
C
m
a
r
g
o
r
P
1
0
2
r
e
t
n
u
o
C
m
a
r
g
o
r
P
1
1
d
n
a
m
m
o
C
e
t
i
r
W
/
d
a
e
R
RW0 and RW1: These bits select the read/write mode of the selected counter.
1
W
R
0
W
R
n
o
i
t
c
n
u
F
e
t
i
r
W
/
d
a
e
R
r
e
t
n
u
o
C
0
0
d
n
a
m
m
o
C
h
c
t
a
L
r
e
t
n
u
o
C
0
1
e
t
y
B
S
L
e
t
i
r
W
/
d
a
e
R
1
0
e
t
y
B
S
M
e
t
i
r
W
/
d
a
e
R
1
1
e
t
y
B
S
M
n
e
h
t
,
e
t
y
B
S
L
e
t
i
r
W
/
d
a
e
R
M0, M1, and M2: These bits set the operational mode of the selected counter.
e
d
o
M
2
M
1
M
0
M
0
0
0
0
1
0
0
1
2
x
1
0
3
x
1
1
4
1
0
0
5
1
0
1
BCD: Set the selected counter to count in binary (0) or BCD (1).
Содержание PCI-WDT 500
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