Chapter 2. Architecture and technical overview
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2.5 System bus
This section provides additional information about the internal buses.
The Power 720 and Power 740 systems have internal I/O connectivity through PCIe slots, and
also external connectivity through InfiniBand adapters.
The internal I/O subsystem on the Power 720 and Power 740 is connected to the GX bus on a
processor in the system. This bus runs at 2.5 GHz and provides 20 GBps of I/O
connectivity to the PCIe slots, integrated Ethernet adapter ports, SAS internal adapters, and
USB ports.
Additionally, the processor chip that is installed on the Power 720 and each of the
processor chips on the Power 740 provide a GX++ bus, which is used to optionally connect to
a 12x GX++ adapter. Each bus runs at 2.5 GHz and provides 20 GBps bandwidth.
One GX++ slot is available on the Power 720 and two GX++ slots are available on the
Power 740. The GX++ Dual-Port 12x Channel Attach Adapter (FC EJ04) can be installed in
either GX++ slot. The first GX++ slot can also be used by the optional PCIe Gen2 Adapter
Riser Card (FC 5685) to add four short, 8x, PICe Gen2 low-profile slots.
Table 2-8 lists the I/O bandwidth configuration of Power 720 and Power 740 processors.
Table 2-8 I/O bandwidth
2.6 Internal I/O subsystem
The internal I/O subsystem resides on the system planar that supports the PCIe slot. PCIe
slots on the Power 720 and Power 740 are not hot pluggable. However, PCIe and PCI-X slots
on the I/O drawers are hot-pluggable.
All PCIe slots support Enhanced Error Handling (EEH). PCI EEH-enabled adapters respond
to a special data packet, generated from the affected PCIe slot hardware, by calling system
firmware, which examines the affected bus, allows the device driver to reset it, and continues
without a system reboot. For Linux, EEH support extends to the majority of frequently used
devices, although various third-party PCI devices might not provide native EEH support.
Remember: The GX++ slots are not hot-pluggable.
I/O
I/O Bandwidth (maximum theoretical)
Power 720
Power 740
GX++ Bus from the first
SCM to the IO chip
10 GBps simplex
20 GBps duplex
10 GBps simplex
20 GBps duplex
GX++ Bus (slot 1)
10 GBps simplex
20 GBps duplex
10 GBps simplex
20 GBps duplex
GX++ Bus (slot 2)
-
10 GBps simplex
20 GBps duplex
Total I/O bandwidth
20 GBps simplex
40 GBps duplex
30 GBps simplex
60 GBps duplex
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