Chapter 2. Architecture and technical overview
57
Figure 2-11 Memory DIMM installation sequence for one processor with two riser cards
Pair 3
Pair 7
Pair 3
Pair 7
Pair 5
Pair 1
Pair 5
Pair 1
Memory Card #2 P1-C17
Pair 4
Pair 8
Pair 4
Pair 8
Pair 6
Pair 2
Pair 6
Pair 2
P1-C11
P1-C17-C1
P1-C17-C2
P1-C17-C3
P1-C17-C4
P1-C17-C7
P1-C17-C8
P1-C17-C9
P1-C17-C10
Memory Card #1 P1-C18
P1-C18-C1
P1-C18-C2
P1-C18-C3
P1-C18-C4
P1-C18-C7
P1-C18-C8
P1-C18-C9
P1-C18-C10
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