— 24 —
SW-4000M-PMCL
EEN
LVAL
//
//
DVAL
//
//
//
G
//
Next trigger start prohibited period
Next trigger input
allowed period
A
B
C
D
E
■
When [ExposureMode] is [Off]
•
Line Start Trigger : On
F
*) About CL Pixel Clock [MHz] and time of 1Clock
CL Pixel Clock [MHz] : 31.70 1CLK : 0.0315μs
CL Pixel Clock [MHz] : 42.41 1CLK : 0.0236μs
CL Pixel Clock [MHz] : 63.39 1CLK : 0.0158μs
CL Pixel Clock [MHz] : 84.82
1CLK : 0.0118μs
Trigger
TapGeometry Bit/Pixel
CL Pixel
Clock[MHz]
Line Period
(CLK) [A]
Actual
Exposure
Time (μs) [B]
EEN invalid
time (μs) [C]
Delay time
from Trigger
to EEN rising
(μs) [D]
Period From
EEN Falling
to LVAL
rising
(μs) [E]
Data
invalid time
(CLK)
[F]
Data
valid time
(CLK)
[G]
31.70
2058
61.32
3.6
4.9
17.9
10
2048
42.41
2065
45.09
3.6
4.9
17.8
17
2048
63.39
2058
28.87
3.6
4.9
17.8
10
2048
84.82
2066
20.76
3.6
4.8
17.8
18
2048
31.70
1371
39.65
3.6
4.9
17.9
7
1364
42.41
1376
28.85
3.6
4.9
17.8
12
1364
63.39
1372
18.04
3.6
4.9
17.8
8
1364
84.82
1376
12.62
3.6
4.8
17.8
12
1364
31.70
1029
28.86
3.6
4.9
17.9
5
1024
42.41
1033
20.76
3.6
4.9
17.8
9
1024
63.39
1030
12.65
3.6
4.9
17.8
6
1024
84.82
1034
8.59
3.6
4.8
17.8
10
1024
31.70
515
12.65
3.6
4.9
17.9
3
512
42.41
517
8.59
3.6
4.9
17.8
5
512
63.39
516
4.54
3.6
4.9
17.8
4
512
84.82
518
2.51
3.6
4.8
17.8
6
512
31.70
412
9.40
3.6
4.9
17.9
3
409
42.41
413
6.14
3.6
4.9
17.8
4
409
63.39
412
2.90
3.6
4.9
17.8
3
409
84.82
425
1.41
3.6
4.8
17.8
16
409
1X2
8/10
1X3
8
1X10
8
1X4
8/10
1X8
8/10
•
Common to [Binning Off] and [Vertical Binning On]
