Страница 1: ...Part No 30534 90001 E i 286 HP 3000 Computer Systems MICRO 3000 SELFTEST and MAINTENANCE MODE Diagnostic Manual 8010 FOOTHILLS BLVD ROSEVILLE CA 95678 Printed in U S A 12 86 ...
Страница 2: ... incidental or consequential damages in connection with the furnishing performance or use of this material Hewlett Packard assumes no responsibility for the use or reiiabiiity of its sofiware on equipment that is not furnished by Hewlett Packard This document contains proprietary information which is protected by copyright All rights are reserved No part of this document may be photocopied reprodu...
Страница 3: ...al and replacement pages to be merged into the manual by the customer The dates on the title page change only when a new edition or a new update is published No information is incorporated into a reprinting unless it appears as a prior update the edition does not change when an update is incorporated First Edition Dec 1986 DEC 86 111 ...
Страница 4: ...e in the manual To verify that your manual contains the most current information check the dates printed at the bottom of each page with those listed below The date on the bottom of each page reflects the edition or subsequent update in which that page was printed Effective Pages Date all Dec 1986 DEC 1986 ...
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Страница 6: ... Time 2 2 Front Panel LED Indicators 2 2 Power On Selftest Execution 2 3 Maintenance Mode 2 4 Test Mode 2 6 Remote Operator Interface 2 6 Establishing the Remote Console Link 2 7 Disconnecting the Remote Console Link 2 7 Section 3 MAINTENANCE MODE COMMAND DESCRIPTIONS Introduction 3 1 Maintenance Mode Commands 3 1 Automatic Warmstart 3 1 Automatic Restart 3 2 Coldstart 3 2 Cooistart 3 3 Disc 3 3 D...
Страница 7: ...Test CPU Exit Help IOMA Memory PON Section 5 SOFTPANEL 3 6 3 7 3 7 3 7 3 8 3 8 4 1 4 1 4 1 4 3 4 3 4 3 4 4 4 4 4 5 4 6 4 6 4 7 4 8 Introduction 5 1 Command Parameters 5 1 Comrnand Descri pt ions 5 2 Display Memory 5 2 Modify Memory 5 3 Register Operations 5 4 Execution Control 5 5 Input Output Operations 5 5 Miscellaneous Commands 5 5 CPU ROMS Date Code 2647 Exceptions 5 6 ...
Страница 8: ... 1 A 4 PIC Test Section 2 A 4 PIC Test Section 3 A S PIC Test Section 4 A 5 PIC Test Section 5 A 6 PIC Test Section 6 A 6 PIC Test Section 7 A 6 PIC Test Section 8 A 7 PIC Test Section 9 A 7 LANIC Selftest Subtest and Error Codes A 8 LANIC Selftest Subtest Codes A 8 LANIC Selftest Error Codes A 9 CPU Test Error Codes A I 0 Memory Test Error Codes A I 0 Power On Selftest LED Interpretation A II App...
Страница 9: ...ce Mode Commands 2 5 Table 2 3 Test Mode Commands 2 6 Table A 1 Power On Selftest LED Interpretation A II Table B 1 TOC RAM Data and Status B 1 Table 8 2 Last Stop Value Meanings B 2 Table B 3 System Halt Causes 8 3 LIST OF FIGURES Figure 2 1 ACTIVITY FAULT LEOs and Keyswitch 2 2 DEC 86 viii ...
Страница 10: ...ializ ation test which initiahl es the ATP and verifies registers l ontain expected data Code Error 0108 Register 8 initialization error expected 0800 0109 Register 9 initializ ation error expeded 08 0 010A Register A initializ ation error expected FFOU 010C Register C initialization error expected 0000 0100 Register D initialization error expected 0000 010E Register E initializa tion error expect...
Страница 11: ...ern test failure ATP Test Section 4 This section is the DMA test SIMB write Word Code Error 0401 DMA state ma hine failed to o to state 4 0402 DMA state machine failed 10 K to litatc 3 0403 DMA write to memory lrallliferrcd improper data 0404 DMA read from memory to RBYTE transferred improper data 0405 DMA read from memory to LBYTE transferred improper data 0406 DMA counter test failed ATP Test Se...
Страница 12: ...0 Port 0 loopback failure 0601 Port 1 loopback failure 0607 Port 7 loopback failure ATP Test Section 7 This section is the DMA loopback data test Code Error 0700 Port 0 loopback data failure 0701 Port 1 loopback data failure 0707 Port 7 loopback data failure Error Codes DEC 86 A 3 ...
Страница 13: ...ster F initialization error expected 0087 8t channelH PIC Test Section 2 This sedion tests basic operations and 0811 IPOLl SMSK and RMSK Code Error 0201 St tlSK RMSK test PIC did not respond with mask bit set 0202 SMSK RMSK test PIC did not respond with mask bit cleared 0203 PIC did not set IRQ after SMSK on selected channel 0204 Improper IPOtl response after SMSK no response wrong response or mul...
Страница 14: ...ten PIC Test Section 4 This section tests the liP III controller I hip Interrupt Register PIC Register 2 and Interrupt Mask Register PIC Register 3 Code Error 0401 Reg2 bit 0 should be set an interrupt is pending 0402 Reg 2 bits 9 and 13 should be clear no handshake abort and inbound FIFO empty 0403 Reg2 bit 12 should be set outbound FIFO room available 0404 Reg 2 bit 14 should be set out bound FI...
Страница 15: ...roller chip interrupt register PIC register 2 should be clear outbound 1 1 70 NOT full and idle 0605 Bit 15 of register 6 should be set clear out bound FI 70 via the liP Ill controller chip interrupt register test Bits 12 and 14 of the uP In controller chip interrupt register should be clear PIC Test Section 7 This section tests PIC register 7 IIP IB address Code Error 0701 Regisier 7 fails io sho...
Страница 16: ...5555 PIC Test Section 9 This section tests DMA Write Read Abort from memory to PIC FIFO and from PIC FIFO to memory Code Error 0901 CSRQ response test via OBSI failed the DMA write to PIC 0902 Data transferred to the PIC FIFO by the above transfer assuming the DMA write abort test passed is incorrect 0903 Bit 9 of the interrupt register PIC reg 2 should be clear no handshake abort the DMA write ab...
Страница 17: ...s 0009 Vord RAM address OOOA Vord Byte address mapping OOOB Z80 memory reference instructions OOOC Values from reset MDIAG SYSCON 0000 eTC data tcst OOOE CTC mode 0 counting OOOF CTC mode 2 counting 0010 eTC mode 4 counting 0011 Interrupt PAL bit 4 0012 Z80 interrupt 0013 Z80 non maskable interrupt 0014 Master handshake disabled MHSDIS 0015 PAODR TO BADDR low 15 bits 0016 ZBANKL 0017 ZBANKH 0018 P...
Страница 18: ...es The system console will display Ile of the following error codes if the LANIC test fails Code Error 0179 Failure while performing 82586 initiali1 ation for the LANIC diagnostic 017A The 82586 did not clear its command word prior to interrupting o17B Selftest result register R 15 bit is bad o17C Z 80 stack underflow during selftest 017D Unexpected Z80 non maskable interrupt NMI 017 Unexpected Z ...
Страница 19: ...power fail 0202 TOe RAM data failure Test Section 3 Toe count verification 0203 TOe not counting Test Section 4 MPE timer verification 0301 TOe not counting Test Section 5 Watchdog timer verification 050 1 Watchdog timer did not rollover MEMORY TEST ERROR CODES The system console displays one of the following error codes if the memory test fails The tests are run in the same sequence as the test s...
Страница 20: ...ry failed llnsupported ATP detected Console ATP failed Fast slow 51MB I F failed Console failed to speed sense Console failed to speed sense Selftest execution complete H for help prompt displayed ACTION TOTAKE Check for AC Measure DC supply output Replace processor Wait for selftest completion Wait for AC power return Replace processor PCA Remove unsupported ATP Replace ATP in slot I or replace p...
Страница 21: ... to 9999 times the default is 1 Looping is disabled when the keyswitch is in position 111 NORMAL Use the maintenance mode TE st command to enter test mode Error messages can be found in Appendix A TEST MODE COMMANDS Test mode allows you to enter the following commands at the Test prompt All All Channel CPU Exit Help IOMAP Memory PON The ALL command runs all of the manually directed selftests excep...
Страница 22: ...ORMAL Test AL TOC RAM Addr Data OOOE 0000 OOOf 0000 0010 0000 0011 0000 0012 0004 0013 OOOE 0014 0000 0015 0000 CPU Test passed Memory Test passed Channel 1 Terminal Interface Controller Channel 4 Peripheral Interface Controller Test Passed System I O Configuration Memory Size MEGABYTES nn Load Channel 4 Device 3 Start Dump Channel 4 Device Channel ID 4 Terminal Interface Controller Channel 4 ID 2...
Страница 23: ... Issues OBII IPOLL SMSK and RMSK and verifies a proper response 3 Port register tests Writes patterns to registers 0 7 of ports 0 7 and verifies the data 4 Diagnostic loopback using DMA sequencer ROM 5 Initiates pec test on all 8 ports 6 Performs DMA data loopback test on all 8 ports The console ATP is speed sensed and communication lines are tested with the local console PIC Test The PIC test has...
Страница 24: ...al Interface Controller Channel 4 Peripheral Interface Controller Test Passed 1 NORMAL Test The test mode CPU command executes the following CPU tests not run at power on P D S and A bank register tests TOC RAM loeation test TOC counting verification MPE timer counting verification Watchdog Timer Force Condition verification and FMD capability test Te sts not performed by this CPU test but execute...
Страница 25: ...or this command is CPU count The following illustrates the use of CPU Exit 1 NORMAL Test CP TOC RAM Addr Data OOOE 0000 ooor 0000 0010 0000 0011 0000 0012 0004 0013 OOOE 0014 0000 0015 0000 CPU test passed 1 NORMAL Test The test mode EXIT command returns execution to maintenance mode and displays the H for help prompt The correct syntax for this command is E xit The following illustrates the use o...
Страница 26: ...command executes a version of IOMAP contained in the selftest ROM This version of IOMAP runs the memory size portion of the memory test displays the number of megabytes installed in the system lists the load and start dump devices and identifies all peAs installed in the system All supported HP IB devices attached to the PIC are identified and their 10 code is displayed with a device description T...
Страница 27: ...attern test and a parity test are performed Upon test completion memory is left with 30F8 halt 8 in all locations The full memory test executes If an error is detected the system console displays the memory test section number the error was detected in The FAULT LED will light and the ACTIVITY LED will go out Refer to Appendix A for list of memory test error codes The test may be looped by specify...
Страница 28: ... initiated by toggling the PON hne NOTE This command cannot be run from keyswitch poslhon 3 REMOTE or from keyswitch position 2 LOCAL directly from position 3 REMOTE The correct syntax for this command is PON count The following illustrates the use of PON 2 LOCAL from Normal Self Test PON Power on Self Test Memory Test passed Memory Size MEGABYTES nn Channel 1 Terminal Interface Controller Channel...
Страница 29: ...ETERS Softpanel command parameters are defined as bank count epxr ioaddr One of the following numeric fields limited to a range of 0 255 8 bits the current radix numeric field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a One of the following numeric fields limited to a 16 bit maximum the current radix numeric field a hexadecimal numeric field precede...
Страница 30: ...c field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a 1 One of the following numeric fields limited to a 16 bit maximum the current radix numeric field a hexadecimal numeric field preceded by a or a digit or an octal numeric field preceded by a 1 One of the foHowing numeric fields limited to a 16 bit maximum the current radix numeric field a hexadecim...
Страница 31: ...s relative to the S register Displays the absolute address relative to the Z register Displays the absolute address relative to the P register Displays the absolute address relative to the PI register Modify memory commands will display the current address current contents and wait for the user to input a new value Input the new value using a numeric field with the current default radix or force t...
Страница 32: ... register Modify the absolute address in the S register Modify the absolute address in the Z register Modify the absolute address in the MPS register Modify the absolute address in the P register Modify the absolute address in the PL register The DR command will display the common registers i e P PB PL CIR DB Q S etc If no field is specified to DR then all common registers will be displayed The op...
Страница 33: ... the current or specified stack ENV allows the user to move back markers of the current stack and access data there as if it were at the current marker ROX aJIows the user to change the current radix Softpanel starts with the radix set to octal The ENV command specified with no parameters will turn ENV off q relative addresses revert to the current environment The options are T numeric numeric Tra...
Страница 34: ...he softpanel the T Trace command to a non ex istent s bank does not print an error message 3 In the softpanel the T Trace command will print the last user stack if the current stack is the ICS but there is no way to use the ENV command to move back to the user stack 4 In the softpanel using t he RIO command to a non existent register produces a watchdog timer interrupt and the onsolc comes back to...
Страница 35: ...rt 0 interrupt time out flag 10 Last stop information See Table 8 2 S11 Sta rt device S12 Load device 13 Undefined 14 Test loop counter lower byte SI5 Test loop counter upper byte SI6 S3F Undefined If the ATP port 0 interrupt time out flag is set contains SAA this means port 0 of the ATP in slot 1 of the SPU has failed to produce an expected interrupt within 500 milliseconds and the microcode has ...
Страница 36: ...error 11 Watc hdog Timer 22 Power failure 23 Control B maintenance mode invoked 24 Mult iple bit paril y error 25 51MB bus parity error 7F MPE UP status removed by software Disables Power Fail Auto Restart 80 System was runnillg MPE or other software Enables Power Fail Auto Restart 81 FF Unused These values may be seen upon TOC power on NOTE Values between SOD and FF not shown in Table H 2 are und...
Страница 37: ...iolation segment 1 2 12 Absent trap while on les 3 SI3 Code segment I tnp violation 4 14 ICS stack overflow 6 16 Initial program load failure 7 17 Illegal SBnk at QI 5 during IXIT 9 19 I suedo Enable when enabled NOTE Values between SI 0 and 1 f not shown ill Table B 3 are undefined DEC 86 ...
