HP E4401B, Руководство программиста

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Chapter 2 2-11
HP ESA Status Registers
Using the Analyzer Status Registers
Summary Bit Creation Through Condition, Filters, and Events
Registers
Status registers (except for the Status Byte Register) consist of
registers whose contents are programmed in order to produce status
summary bits. These summary bits are then manipulated as follows:
The condition register passes summary bits to the negative and positive
transition filters, after which they are stored in the event register. The
contents of the event register are logically ANDed with the contents of
the event enable register and the result is logically ORed to produce a
status summary bit. The status summary bit is then passed to the
Status Byte Register directly, or through the Questionable Status
register and then to the Status Byte Register.
Condition
Register
A condition register continuously monitors the
hardware and firmware status of the analyzer. There is
no latching or buffering for a condition register. It is
updated in real time.
Negative
Transition
Register
A negative transition register specifies the bits in the
condition register that will set corresponding bits in the
event register when the condition bit changes from 1 to
0.
Positive
Transition
Register
A positive transition register specifies the bits in the
condition register that will set corresponding bits in the
event register when the condition bit changes from 0 to
1.
Event
Register
An event register latches transition events from the
condition register as specified by the positive and
negative transition filters. Bits in the event register are
latched, and once set, they remain set until cleared by
either querying the register contents or sending the
*CLS
command.
Event
Enable
Register
An enable register specifies the bits in the event
register that can generate a summary bit. Summary
bits are, in turn, used by the status byte register.