HP 828689-002, Руководство пользователя

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Hardware options installation 26
DIMM type DIMM rank One processor Two processors
RDIMM
Single-rank (8 GB) 64 GB 128 GB
RDIMM
Dual-rank (16 GB) 128 GB 256 GB
LRDIMM
Quad-rank (32 GB) 256 GB 512 GB
For the latest memory configuration information, see the QuickSpecs on the Hewlett Packard Enterprise
website (
http://www.hpe.com/info/qs
).
Advanced ECC memory configuration
Advanced ECC memory is the default memory protection mode for this server. Standard ECC can correct
single-bit memory errors and detect multi-bit memory errors. When multi-bit errors are detected using
Standard ECC, the error is signaled to the server and causes the server to halt.
Advanced ECC protects the server against some multi-bit memory errors. Advanced ECC can correct
both single-bit memory errors and 4-bit memory errors if all failed bits are on the same DRAM device on
the DIMM.
Advanced ECC provides additional protection over Standard ECC because it is possible to correct certain
memory errors that would otherwise be uncorrected and result in a server failure. Using HPE Advanced
Memory Error Detection technology, the server provides notification when a DIMM is degrading and has a
higher probability of uncorrectable memory error.
Online Spare memory configuration
Online spare memory provides protection against degraded DIMMs by reducing the likelihood of
uncorrected memory errors. This protection is available without any operating system support.
Online spare memory protection dedicates one rank of each memory channel for use as spare memory.
The remaining ranks are available for OS and application use. If correctable memory errors occur at a rate
higher than a specific threshold on any of the non-spare ranks, the server automatically copies the
memory contents of the degraded rank to the online spare rank. The server then deactivates the failing
rank and automatically switches over to the online spare rank.
Mirrored memory configuration
Mirroring provides protection against uncorrected memory errors that would otherwise result in server
downtime. Mirroring is performed at the channel level.
Data is written to both memory channels. Data is read from one of the two memory channels. If an
uncorrectable error is detected in the active memory channel, data is retrieved from the mirror channel.
This channel becomes the new active channel, and the system disables the channel with the failed DIMM.
General DIMM slot population guidelines
Observe the following guidelines for all AMP modes:
•
Install DIMMs only if the corresponding processor is installed.
•
When two processors are installed, balance the DIMMs across the two processors.
•
White DIMM slots denote the first slot of a channel (Ch 1-A, Ch 2-B, Ch 3-C, Ch 4-D)
•
Do not mix RDIMMs and LRDIMMs.
•
When one processor is installed, install DIMMs in sequential alphabetic order: A, B, C, D, E, F, and
so forth.
•
When two processors are installed, install the DIMMs in sequential alphabetic order balanced
between the two processors: P1-A, P2-A, P1-B, P2-B, P1-C, P2-C, and so forth.