HT46R46/C46/R47/C47/R48A/C48A/R49
Rev. 1.41
13
December 30, 2008
Structure
The two sections of Data Memory, the Special Purpose
and General Purpose Data Memory are located at con-
secutive locations. All are implemented in RAM and are
8 bits wide but the length of each memory section is dic-
tated by the type of microcontroller chosen. The start
address of the Data Memory for all devices is the ad-
dress
²
00H
²
. Registers which are common to all
microcontrollers, such as ACC, PCL, etc., have the
same Data Memory address.
General Purpose Data Memory
All microcontroller programs require an area of
read/write memory where temporary data can be stored
and retrieved for use later. It is this area of RAM memory
that is known as General Purpose Data Memory. This
area of Data Memory is fully accessible by the user pro-
gram for both read and write operations. By using the
²
SET [m].i
²
and
²
CLR [m].i
²
instructions individual bits
can be set or reset under program control giving the
user a large range of flexibility for bit manipulation in the
Data Memory.
Special Purpose Data Memory
This area of Data Memory is where registers, necessary
for the correct operation of the microcontroller, are
stored. Most of the registers are both readable and
writable but some are protected and are readable only,
the details of which are located under the relevant Spe-
cial Function Register section. Note that for locations
that are unused, any read instruction to these addresses
will return the value
²
00H
²
.
Special Function Registers
To ensure successful operation of the microcontroller,
certain internal registers are implemented in the Data
Memory area. These registers ensure correct operation
of internal functions such as timers, interrupts, etc., as
well as external functions such as I/O data control and
A/D converter operation. The location of these registers
within the Data Memory begins at the address 00H. Any
unused Data Memory locations between these special
function registers and the point where the General Pur-
pose Memory begins is reserved for future expansion
purposes, attempting to read data from these locations
will return a value of 00H.
Indirect Addressing Register
-
IAR
The IAR register, located at Data Memory address
²
00H
²
, is not physically implemented. This special regis-
ter allows what is known as indirect addressing, which
permits data manipulation using Memory Pointers in-
stead of the usual direct memory addressing method
where the actual memory address is defined. Any ac-
tions on the IAR register will result in corresponding
read/write operations to the memory location specified
by the Memory Pointer MP. Reading the IAR register in-
directly will return a result of
²
00H
²
and writing to the
register indirectly will result in no operation.
Memory Pointer
-
MP
One Memory Pointer, known as MP, is physically imple-
mented in Data Memory. The Memory Pointer can be
written to and manipulated in the same way as normal
registers providing an easy way of addressing and
tracking data. When using any operation on the indirect
addressing register IAR, it is actually the address speci-
fied by the Memory Pointer that the microcontroller will
be directed to.
For devices with 64 or 88 bytes of RAM Data Memory,
bit 7 of the Memory Pointer is not implemented. How-
ever, it must be noted that when the Memory Pointer for
these devices is read, bit 7 will be read as high.
G e n e r a l P u r p o s e
D a t a M e m o r y
S p e c i a l P u r p o s e
D a t a M e m o r y
0 0 H
4 0 H
B F H
3 F H
G e n e r a l P u r p o s e
D a t a M e m o r y
S p e c i a l P u r p o s e
D a t a M e m o r y
0 0 H
4 0 H
7 F H
3 F H
H T 4 6 R 4 6 a n d H T 4 6 R 4 7
H T 4 6 R 4 9
G e n e r a l P u r p o s e
D a t a M e m o r y
S p e c i a l P u r p o s e
D a t a M e m o r y
0 0 H
2 8 H
7 F H
2 7 H
H T 4 6 R 4 8 A
Data Memory Structure
Note:
Most of the Data Memory bits can be directly manipulated using the
²
SET [m].i
²
and
²
CLR [m].i
²
with the excep-
tion of a few dedicated bits. The Data Memory can also be accessed through the memory pointer register MP.
