AN-175
20
Holt Integrated Circuits
HI-3110 Interrupts
The HI-3110 can be configured to output status on the INT, STAT, GP1 and GP2 pins which connect to
the MCU PP0 – PP3 inputs. Interrupt handlers are provided for the GP1 and GP1 for servicing TXCPLT
and RXFIFO respectively on the PP3 and PP2 pins which are enabled by calling PortP_Int().
Interrupt 56 void PORTP_ISR(void)
The PP2 interrupt handler is provided to interrupt when the 3110 receives a CAN Bus frame of data. This
interrupt handler is utilized only in Receive Mode Interrupt Mode-6. Once an interrupt occurs the
interrupt handler fetches the frame of data and stores the data into a global buffer (g_RXBuffer) and
then sets a flag “g_RecRdy=TRUE”. The main receiver function looks for this flag and fetches the new
CAN data when this flag is set.
There are two other possible sources for hardware interrupts using the XIRQ and IRQ inputs reserved for
possible future use.
3110Driver.c Drivers
All the HI-3110 SPI drivers are contained in this module for reading and writing to the control registers,
status registers, filters/masks and FIFO’s .
There are several functions to read in a single byte from the 3110 SPI port, write a command to the 3110
SPI port and a few others which read or write a command plus a multiple number of bytes. For example
the function below is the basic function to write out a command plus one byte of data to the 3110 SPI
port.
// Write SPI Command with a Value to HI-3110
void W_CommandValue (uint8 cmd, uint8 value){
uint8 dummy;
SPI0CR1 = SPI0CR1 & ~SPI0CR1_SSOE_MASK; // disable auto /SS output, reset /SS Output
SPI0CR2 = SPI0CR2 & ~SPI0CR2_MODFEN_MASK; // disable auto /SS output, reset SPI0 Mode
SPI0_nSS = 0; // assert the SPI0 /SS strobe
dummy = SPI0SR; // clear SPI status register
SPI0DR = cmd; // SPI command
while (!SPI0SR_SPIF);
dummy = SPI0DR; // read Rx data in Data Reg to reset SPIF
dummy = SPI0SR; // clear SPI status register
SPI0DR = value; // Reset values
while (!SPI0SR_SPIF);
dummy = SPI0DR; // read Rx data in Data Reg to reset SPIF
SPI0_nSS = 1; // negate the SPI0 /SS strobe
SPI0CR1 = SPI0CR1 | SPI0CR1_SSOE_MASK; // enable auto /SS output, set /SS Output
SPI0CR2 = SPI0CR2 | SPI0CR2_MODFEN_MASK; // enable auto /SS output, set SPI0 Mode Fault
}
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