Hitachi 51F510, Руководство пользователя

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DP-4X MICROPROCESSOR DATA COMMUNICATIONS CIRCUIT EXPLANATION
PAGE 02-03
I009 Level Shift
The Microprocessor I004 operates at 3.3Vdc. Most of the Circuits controlled by the Microprocessor operate at
5Vdc. The Level Shift IC steps up the DC voltage to accommodate. This IC isn’t controlled by the Microproces-
sor, however it is in direct contact with Data transmission and is included in the communication circuit.
•
Pin (
17
) outputs a 5V Clock signal, used by the Flex Converter
•
Pin ( 18 ) outputs a 5V Enable signal, used by the Flex Converter
•
Pin ( 16 ) outputs a 5V Data signal, used by the Flex Converter.
•
Pin ( 15 ) outputs a 3.3V Data, sent from the Flex Converter
IA01 BBE Audio Control (Surround)
This chassis utilizes BBE Surround.
Communication from the Microprocessor via pins (
30 SDA1 and 29 SCL1 ) to the Audio Control IC IA01 pins
( 13 and 14 ) respectively.
IV02 3D Y/C (IC mounted directly on the Terminal PWB).
The 3D Y/C IC is a Luminance/Chrominance separator, as well as a 3D adder. Separation takes place digitally.
Using advanced separation technology, this circuit separates using multiple lines and doesn’t produce dot pattern
interference or dot crawl. The 3D effect is a process of adding additional emphasis signals to the Luminance and
Chrominance. These signals relate specifically to transitions. Transitions are the point where the signal goes from
dark to light or vice versa. The 3D adds a little more black before the transition goes to white and a little more
white just before it gets to white. It also adds a little more white just before it goes dark and a little more dark just
before it arrives. This gives the impression that the signal pops out of the screen or a 3D effect.
The Microprocessor communicates with the 3D Y/C IC via I
2
C bus data and clock. The communications ports
from the Microprocessor I004 are pins ( 30 SDA1 and 29 SCL1 ) to the 3D Y/C IV02 pins ( 47 and 46 ) respec-
tively.
The Microprocessor also is able to turn on and off circuits within the 3D Y/C circuit determined by customer’s
menu set-up.
IV08 1H Main Video Chroma
This IC is responsible for receiving the Main NTSC (1H) signal in separated format, (Y and C) and converting it
to a usable signal for the rest of the circuits. (Y Cr/Cb). Communication from the Microprocessor via pins (
30
SDA1
and
29 SCL1
) to
IV08
pins (
34
and
33
) respectively.
IV12 1H Sub Video Chroma
This IC is responsible for receiving the Sub (PinP) NTSC (1H) signal in separated format, (Y and C) and convert-
ing it to a usable signal for the rest of the circuits. (Y Cr/Cb). Communication from the Microprocessor via pins
(
30 SDA1 and 29 SCL1 ) to IV08 pins ( 34 and 33 ) respectively.
IY04 Rainforest (RGB Video/Chroma Processor)
The Video Processing IC (Rainforest) is responsible for controlling video/chroma processing before the signal is
made available to the CRTs. Some of the emphasis circuits are controlled by the customer’s menu. As well as
some of them being controlled by AI, (Artificial Intelligence).
Communication from the Microprocessor
I004
via pins (
30 SDA1
and
29 SCL1
) to the Rainforest IC
IY04
pins
( 28 and 30 ) respectively.
(Continued on page 4)