Block diagram
Putting into operation
IRD 8500/..
2 - 8
Intergrated Receiver Decoder
1st SAT-IF
e
AUD
IO
a
AUD
IO
m
VIDEO
a
VIDEO
a
VIDEO
m
D
A
Video -
Encoder
FPGA
MPEG-
Decoder
MPEG-
Demux
Data
Latch
Data
Latch
Common
Interface CI
SAT-
Demodulator
Option
MPEG-
Interface
m
C
to Conditional
Access Module
MPEG SPI
input
MPEG SPI/ASI
output
TTX
OUT
LCD
/
Keyboard
RS 232
Alarms
Ethernet
Monitoring/
Control
Power
Supply
230/115 VAC
Block diagram Integrated Receiver Decoder with option MPEG-interface
