F3 DIO 8/8 01
Appendix
HI 800 179 E Rev. 2.00
Page 47 of 52
Appendix
Glossary
Term
Description
ARP
Address resolution protocol: Network protocol for assigning the network addresses to
hardware addresses
AI Analog
input
AO Analog
output
COM Communication
module
CRC
Cyclic redundancy check
DI Digital
input
DO Digital
output
ELOP II Factory
Programming tool for HIMatrix systems
EMC Electromagnetic
compatibility
EN European
norm
ESD Electrostatic
discharge
FB Fieldbus
FBD
Function block diagrams
FTT
Fault tolerance time
ICMP
Internet control message protocol: Network protocol for status or error messages
IEC
International electrotechnical commission
MAC address
Media access control address: Hardware address of one network connection
PADT
Programming and debugging tool (in accordance with IEC 61131-3),
PC with SILworX or ELOP II Factory
PE Protective
earth
PELV
Protective extra low voltage
PES
Programmable electronic system
R
Read: The system variable or signal provides value, e.g., to the user program
Rack ID
Base plate identification (number)
Interference-free
Supposing that two input circuits are connected to the same source (e.g., a
transmitter). An input circuit is termed
interference-free
if it does not distort the signals
of the other input circuit.
R/W
Read/Write (column title for system variable/signal type)
SELV
Safety extra low voltage
SFF
Safe failure fraction, portion of faults that can be safely controlled
SIL
Safety integrity level (in accordance with IEC 61508)
SILworX
Programming tool for HIMatrix systems
SNTP
Simple network time protocol (RFC 1769)
SRS
System.rack.slot addressing of a module
SW Software
TMO Timeout
W
Write: System variable/signal is provided with value, e.g., from the user program
r
PP
Peak-to-peak value of a total AC component
Watchdog (WD)
Time monitoring for modules or programs. If the watchdog time is exceeded, the
module or program enters the ERROR STOP state.
WDT Watchdog
time
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