hilscher NXHX 90-JTAG, Описание устройства

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Pin Signal options: Communication interfaces and digital I/O
X600 netX
90
UART XC GPIO IO Link Ethernet PIO
(APP CPU) XM CAN MLED
61 B9 – – – – –
PIO_APP5
– – –
62 C9 – – – – –
PIO_APP4
– – –
63 A10 – – – – –
PIO_APP3
– – –
64 B10 – – – – –
PIO_APP2
– – –
65 C10 – – – – –
PIO_APP1
– – –
66 B11 – – – – –
PIO_APP0
– – –
67 – – – – – – – – – –
68 E6 – – – – – – – – –
Table 17: Signal options of X600 pins – communication interfaces and digital I/O (3)
2.4.4 X601 – SPM host interface connector via SQI/SPI
Pin header X601 for connecting a host to the Serial Dual-Port Memory
(SPM) of the netX via SQI/SPI. For identifying the connector on the board,
see position
(3) in section Positions of interfaces and operating
elements [ } page 12].
X601 Pin Signal
SQI0 SPI0
1
SIRQ# SIRQ#
2
+3V3 +3V3
3
DIRQ# DIRQ#
4
GND GND
5
CLK CLK
6
GND GND
7
CS# CS#
8
GND GND
9
SIO0 MOSI
10
GND GND
11
SIO1 MISO
12
GND GND
13
SIO2
Not connected
14
GND GND
15
SIO3
Not connected
18
GND GND
Table 18: Pin assignments X601
NXHX 90-JTAG | Device description
DOC170202HW03EN | Revision 3 | English | 2019-01 | Released | Public © Hilscher 2019