Design-In - Electrical Aspects
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COMX Communication Modules | Design Guide
DOC100901DG18EN | Revision 18 | English | 2013-12 | Released | Public
© Hilscher, 2002-2013
3.1.8.2
Address Bus and Data Bus
These signal lines contain the address bus lines DPM_A0 up to DPM_A13 and data bus lines
DPM_D0 up to DPM_D15 of the dual-port memory. The address and data lines are non-
multiplexed. The address line DPM_A13 is only used at COMX devices to access a linear
16 KByte dual-port memory size.
The COMX devices support additional data bus lines to drive a 16 Bit data interface. If your host
interface can support 16 Bit you should connect the DPM_SIRQn signal to ground. If not please let
this uncommitted that 16 Bit modules will work in an 8 bit compatible mode.
In case of a 16 Bit system you have to generate the DPM_BHEn and DPM_A0 signal according
the following table.
DPM_BHEn DPM_A0
Function
0 0 word
access
0 1 access
high
byte
1 0 access
low
byte
1 1 no
access
Table 36: Function Table of the 16 Bit Decode Logic
3.1.8.3
Dual-Port Memory Control Lines
The user has to integrate the dual-port memory by mapping the memory space of the dual-port
memory into the address range of the host system.
The access to the dual-port memory is handled over the control lines write DPM_WRn, read
DPM_RDn and chip select DPM_CSn and could be used like standard static RAM. All signals are
low active.
3.1.8.4
Interrupt Line to the Host System
The signal DPM_DIRQn can be used to generate an interrupt to the host system when the netX of
the COMX module writes into the specific handshake cells of the dual-port memory. These cells
are used for synchronization of the COMX Modules and the host system and have handshake bits.
For detailed information about the handshake bits refer to [1]. The interrupt will be cleared if the
host reads the handshake cell that was written from the netX of the COMX module.
Important Note:
In interrupt mode, when an 8 bit-host performs a read access to any of the 16 bit wide
handshake registers, the netX releases the interrupt as soon as the high byte or the
low byte was read. The read order (high byte first or low byte first) is irrelevant. An
8 bit-host shall use polling mode instead of interrupt mode.
Note:
Signal DPM_DIRQn has on the module
a 4,7 k
Ω
pull-up resistor for COMX 10 and COMX 51,
a 10 k
Ω
pull-up resistor for COMX 100 and COMX 50CA-CCS,
a 50 k
Ω
pull-up resistor for COMX 50CA-REFO.