30
ERX1-
Even pixel Negative LVDS differential data input. Channel 1
31
ERX1+
Even pixel Positive LVDS differential data input. Channel 1
32
ERX2-
Even pixel Negative LVDS differential data input. Channel 2
33
ERX2+
Even pixel Positive LVDS differential data input. Channel 2
34
GND
Ground
35
ECLK-
Even pixel Negative LVDS differential clock input
36
ECLK+
Even pixel Positive LVDS differential clock input
(4)
37
GND
Ground
38
ERX3-
Even pixel Negative LVDS differential data input. Channel 3
39
ERX3+
Even pixel Positive LVDS differential data input. Channel 3
(4)
40
N.C.
No Connection
41
N.C.
No Connection
42
N.C.
No Connection
43
N.C.
No Connection
(1)
44
GND
Ground
45
GND
Ground
46
GND
Ground
47
N.C.
No Connection
(1)
48
VCC
Power input (+12V)
49
VCC
Power input (+12V)
50
VCC
Power input (+12V)
51
VCC
Power input (+12V)
Note (1) Reserved for internal use. Please leave it open.
Note (2) Connect to Open or +3.3V: VESA Format, connect to GND: JEIDA Format.
SELLVDS
Mode
H(default)
VESA
L
JEIDA
L : Connect to GND, H: Connect to +3.3V
Note (3) Interface optional pin has internal scheme as following diagram. Customer should keep the interface voltage level
requirement which including Panel board loading as below.
Service Manual
Model No.: