Haier LE55B1381a, Руководство по обслуживанию

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S ervice M a nu a l
Model No.:
- 3 1 -
D C B A
v
10
v
10
v
10
5 5
4 4
3 3
2 2
1 1
D C B A
D
V
D_YPbPr_RIN-
D
V
D_YP
D
V
D_YP
D
V
D_YP
D
V
D_YPbPr_BIN-
D
V
D_YPbPr_GIN-
D
V
D_YPbPr_
S
OG
U
A
RT-TXD
U
A
RT-RXD
R0_RXOC-
B_MDDR_
V
REF
LED
MIU
A
_DQ
6
MIU
A
_DQ1
2
MIU
A
_
A6
MIU
A
_DQ1
MIU
A
_
A
1
2
HDMI0-HPDIN HDMI0-CLKN HDMI0-RX1P HDMI0-RX
2
N
HDMI0-RX1N HDMI0-RX
2
P
HDMI0-RX0N HDMI0-RX0P
MIU
A
_C
AS
Z
MIU
A
_R
AS
Z
HDMI0-CLKP
D_RF_
A
GC
SV
-Yin
HDMI1-HPDIN HDMI1-
S
D
A
HDMI1-
S
CL
HDMI1-CLKN HDMI1-RX1P HDMI0-HPDIN HDMI1-RX
2
N
HDMI1-RX1N HDMI1-RX
2
P
HDMI1-RX0N HDMI1-RX0P HDMI1-CLKP
A
U
V
RM
A
U
V
RP
A
U
VA
G
HDMI0-
S
D
A
HDMI0-
S
CL
HDMI-CEC HDMI0-CLKN HDMI0-RX1P HDMI0-RX
2
N
HDMI0-RX1N HDMI0-RX
2
P
HDMI0-RX0N HDMI0-RX0P HDMI0-CLKP
+1.3
2V
_DC
A
MP_LIN
A
MP_RIN
MIU
A
_DQ
7
MIU
A
_DQ13
FL
AS
H_WPN
XT
A
LI
MIU
A
_DQ
S
1
MIU
A
_MCLK
MIU
A
_DQ
S
B1
MIU
A
_DQ
S
B0
MIU
A
_DQ
S
0
MIU
A
_MCLKZ
YPbPr_
S
OG
MIU
A
_
A7
MIU
A
_
A
1
MIU
A
_
A
13
HDMI0-
S
D
A
HDMI0-
S
CL
LINE_IN_0L LINE_IN_1L LINE_IN_1R LINE_IN_0R
SV
-Cin
MIU
A
_MCKE
MIU
A
_DQ8
MIU
A
_DQ
2
MIU
A
_DQ14
MIU
A
_
A2
MIU
A
_
A
8
P
a
nel_ON
MUTE_
A
MP
D
V
D_
S
TB
S
PDIF_OUT
MIU
A
_DQM0
MIU
A
_DQM1
U
A
RT-RX
S
CLK
S
D
A
T
A
UOUTR0
A
MP_RIN
A
UOUTL0
S
D
A
A
MP_LIN
GIN+ RIN+ BIN+ RIN- GIN- BIN-
PB
A
CK_
A
DJ
+3.3
V
stb
PWM0
2
.5
V
_M
A
INCHIP
MIU
A
_WEZ
MIU
A
_DQ9
MIU
A
_DQ3
MIU
A
_DQ15
U
A
RT-RX
U
A
RT-TX
B_MDDR_
V
REF
MIU
A
_
A
3
MIU
A
_
A
9
MIU
A
_B
A2
U
A
RT-TX
DT
V
-IFN
S
CL
DT
V
-IFP
1.8
VA
KEY_0
DEMOD_IF_
A
GC
YP YP YP YPbPr_RIN- YPbPr_BIN- YPbPr_GIN- V
G
A
_
VS
YNC0
V
G
A
_H
S
YNC0
ON_PB
A
CK
V
DDP
XT
A
LI
PW_ON/OFF S
PI-
S
DO
S
CL
U
S
B0_DP
U
A
RT-TXD
PWM1
XT
A
LO
S
PI-
S
DI
U
S
B0_DM
U
A
RT-RXD
KEY_1
S
PI-C
S
0N
S
D
A
IR_
S
YNC
S
yste
m
-R
S
T
S
PI-
S
CK
AV
DD_MEMPLL
MIU
A
_DQ10
MIU
A
_DQ4
S
yste
m
-R
S
T
MIU
A
_
A
4
MIU
A
_
A
10
MIU
A
_ODT
R3_RXO
2
+
R
7
_RXO0+
G
7
_RXO3+
R
2
_RXO
2
-
G
6
_RXO3-
R
6
_RXO0-
R4_RXO1-
MIU
A
_DQ0
PW_ON/OFF
AV
_
V
IN
AV2
_RIN
V
COM0
P
a
nel_ON
MIU
A
_
A
0
U
S
B0_DP
U
S
B0_DM
AVSS
_PG
A
MIU
A
_B
A2
MIU
A
_B
A
0
MIU
A
_B
A
1
MIU
A
_DQ5
MIU
A
_DQ11
D
V
D_EN
MIU
A
_
A
5
MIU
A
_
A
11
B
7
_RXE
2
+
G0_RXE1- G
2
_RXE0-
B
2
_RXE3-
B4_RXEC- B
6
_RXE
2
-
XT
A
LO
MIU
A
_DQM0
MIU
A
_DQM1
MIU
A
_
A
[13:0]
MIU
A
_DQ[15:0]
MIU
A
_WEZ
MIU
A
_MCLK
AV2
_LIN
MIU
A
_MCLKZ
MIU
A
_MCKE
MIU
A
_C
AS
Z
MIU
A
_B
A
0
MIU
A
_R
AS
Z
MIU
A
_B
A
1
MIU
A
_ODT
MIU
A
_DQ
S
0
MIU
A
_DQ
S
B0
MIU
A
_DQ
S
B1
MIU
A
_DQ
S
1
PWM0
I
2S
_OUT_BCK
I
2S
_OUT_MCK
I
2S
_OUT_
S
D
PWM1
FL
AS
H_WPN
S
PI_
S
CK
S
PI_
S
DI
S
PI_
S
DO
S
PI_C
S
N_1
FL
AS
H_WPN1
S
PI_C
S
N_1
S
PI_
S
DO
S
PI-
S
DO
S
PI-C
S
0N
S
PI-
S
CK
S
PI-
S
DI
S
PI_
S
CK
S
PI_
S
DI
D
V
D_
A
UTO
YPbPr_GIN- YP YP YPbPr_BIN- YPbPr_RIN- YP YPbPr_
S
OG
BIN- RIN+ GIN+ BIN+ GIN- RIN- V
G
A
_
VS
YNC0
V
G
A
_H
S
YNC0
D
V
D_YPbPr_
S
OG
SV
-Yin
SV
-Cin
V
COM0
AV
_
V
IN
D
V
D_YP
D
V
D_YPbPr_BIN-
D
V
D_YPbPr_GIN-
D
V
D_YPbPr_RIN-
D
V
D_YP
D
V
D_YP
I
2S
_OUT_MCK
I
2S
_OUT_BCK
DT
V
-IFN
S
CLK
S
D
A
T
D_RF_
A
GC
A
U
V
RM
I
2S
_OUT_
S
D
D
V
D_EN
A
UOUTL0
A
UOUTR0
A
U
V
RP
A
U
VA
G
S
PDIF_OUT
DT
V
-IFP
DEMOD_IF_
A
GC
D
V
D_
A
UTO
D
V
D_
S
TB
G
7
_RXO3+
G
6
_RXO3-
R3_RXO
2
+
R
2
_RXO
2
-
B
2
_RXE3-
B4_RXEC- B
7
_RXE
2
+
B
6
_RXE
2
-
R4_RXO1- R
7
_RXO0+
R
6
_RXO0-
G0_RXE1- G
2
_RXE0-
TE
S
TPIN
+3.3
V
stb
+3.3
V
stb
AV
DD
2
P5_PG
A
AVSS
_PG
A
D
V
DD_NODIE
+3.3
V
stb
+3.3
V
stb
R0_RXOC-
AV2
_RIN
AV2
_LIN
LINE_IN_1L LINE_IN_1R LINE_IN_0R LINE_IN_0L YPBPR
2
-Lin
YPBPR
2
-Rin
YPBPR
2
-Rin
YPBPR
2
-Lin
B1_RXE4- G5_RXO4-
G5_RXO4- B1_RXE4-
MUTE_
A
MP
ON_PB
A
CK
PB
A
CK_
A
DJ
HDMI
2
-HPDIN
HDMI
2
-
S
D
A
HDMI
2
-
S
CL
HDMI
2
-CLKN
HDMI
2
-RX1P
HDMI
2
-RX
2
N
HDMI
2
-RX1N
HDMI
2
-RX
2
P
HDMI
2
-RX0N
HDMI
2
-RX0P
HDMI
2
-CLKP
HDMI
2
-HPDIN
HDMI
2
-CLKN
HDMI
2
-RX1P
HDMI
2
-RX
2
N
HDMI
2
-RX1N
HDMI
2
-RX
2
P
HDMI
2
-RX0N
HDMI
2
-RX0P
HDMI
2
-CLKP
HDMI
2
-
S
D
A
HDMI
2
-
S
CL
HDMI1-HPDIN HDMI1-CLKN HDMI1-RX1P HDMI1-RX
2
N
HDMI1-RX1N HDMI1-RX
2
P
HDMI1-RX0N HDMI1-RX0P HDMI1-CLKP HDMI1-
S
D
A
HDMI1-
S
CL
HDMI-CEC
I
2
C-
S
D
A
I
2
C-
S
CL
S
D
A
S
CL
S
CL
S
D
A
I
2
C-
S
CL
I
2
C-
S
D
A
A
UOUTL1
A
UOUTR1
A
UOUTL
2
A
UOUTR
2
a
udio_Out_l
a
udio_Out_r
A
UOUTL1
A
UOUTR1
A
UOUTR
2
a
udio_Out_r
A
UOUTL
2
a
udio_Out_l
MUTE_DET
MUTE_DET
D
V
D_PW_ON
D
V
D_PW_ON
+3.3
V
stb
+5
V
_
S
W
AV
DD_MEMPLL
+3.3
V
stb
2
.5
V
_M
A
INCHIP
1.8
VA
1.8
VA
+
2
.5
V
+3.3
V
stb
+1.3
2V
_DC
+3.3
V
_
S
W
V
DDP
+3.3
V
_
S
W
+3.3
V
_
S
W
+3.3
V
_
S
W
AV
DD
2
P5_PG
A
+5
V
stb
+3.3
V
_
S
W
+3.3
V
stb
+3.3
V
stb
+5
V
_
S
W
+1
2V
_
S
W
TUNER_3.3
S
PDIF_OUT
HDMI0-RX1P
GIN+
D
V
D_
S
TB
DEMOD_IF_
A
GC
R
2
_RXO
2
-
P
a
nel_ON
SV
-Yin
HDMI1-RX1P HDMI1-RX1N HDMI1-RX
2
P
HDMI1-
S
CL
HDMI1-RX
2
N
HDMI1-
S
D
A
HDMI1-CLKP HDMI1-RX0P HDMI1-CLKN HDMI1-RX0N HDMI1-HPDIN
YPbPr_
S
OG
AV
_
V
IN
HDMI0-RX1N
BIN-
MIU
A
_B
A2
R0_RXOC-
MIU
A
_C
AS
Z
MIU
A
_MCLK
MIU
A
_MCLKZ
MIU
A
_MCKE
MIU
A
_WEZ
R3_RXO
2
+
U
S
B0_DP
SV
-Cin
YP
HDMI0-RX
2
P
D
V
D_YPbPr_RIN-
D
V
D_YP
D
V
D_YPbPr_
S
OG
D
V
D_YP
D
V
D_YPbPr_GIN-
D
V
D_YP
D
V
D_YPbPr_BIN-
BIN+
MIU
A
_DQ
S
B0
MIU
A
_R
AS
Z
MIU
A
_B
A
0
MIU
A
_B
A
1
MIU
A
_ODT
YPbPr_RIN-
HDMI0-
S
CL
MIU
A
_DQM1
MIU
A
_DQ
S
0
MIU
A
_DQ
S
B1
MIU
A
_DQ
S
1
MIU
A
_DQM0
G
6
_RXO3-
U
S
B0_DM
YP
HDMI0-RX
2
N
S
CLK
S
D
A
T
V
G
A
_H
S
YNC0
D_RF_
A
GC
R
6
_RXO0-
YPbPr_GIN-
HDMI0-
S
D
A
G
7
_RXO3+
V
COM0
U
A
RT-RX
U
A
RT-TX
HDMI-CEC
RIN-
HDMI0-CLKP
V
G
A
_
VS
YNC0
IF+ IF-
YP
LINE_IN_0R LINE_IN_0L
R
7
_RXO0+
A
MP_RIN
B4_RXEC- B
7
_RXE
2
+
B
2
_RXE3-
G
2
_RXE0-
G0_RXE1- B
6
_RXE
2
-
HDMI0-RX0P
YPbPr_BIN- RIN+
LINE_IN_1L LINE_IN_1R
HDMI0-CLKN
R4_RXO1-
A
MP_LIN
MIU
A
_DQ[15:0]
AV2
_RIN
AV2
_LIN
HDMI0-RX0N
GIN-
MIU
A
_
A
[13:0]
HDMI0-HPDIN
PW_ON/OFF
D
V
D_EN
LED
KEY_0 KEY_1
IR_
S
YNC
D
V
D_
A
UTO
YPBPR
2
-Rin
YPBPR
2
-Lin
G5_RXO4- B1_RXE4-
MUTE_
A
MP
ON_PB
A
CK
PB
A
CK_
A
DJ
HDMI
2
-RX1P
6
HDMI
2
-RX1N
6
HDMI
2
-RX
2
P
6
HDMI
2
-
S
CL
6
HDMI
2
-RX
2
N
6
HDMI
2
-
S
D
A
6
HDMI
2
-CLKP
6
HDMI
2
-RX0P
6
HDMI
2
-CLKN
6
HDMI
2
-RX0N
6
HDMI
2
-HPDIN
6
I
2
C-
S
D
A
I
2
C-
S
CL
a
udio_Out_l
a
udio_Out_r
A
UOUTL1
A
UOUTR1
MUTE_DET
9
D
V
D_PW_ON
2
Title
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03.MSD318QT
CV318H-A-20
Custo
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39
Wednesd
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A
pril
2
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2
011
Title
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03.MSD318QT
CV318H-A-20
Custo
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39
Wednesd
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A
pril
2
0,
2
011
Title
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R
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03.MSD318QT
CV318H-A-20
Custo
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39
Wednesd
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A
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2
0,
2
011
DEBUG PORT
VDDC 1.2V_MAIN
LVDS Block
HDMI Block
Close to IC with width trace
MSTIC_POWER_MAIN
System XTAL
DDR2-SDRAM Block
DDR2 Power
AUDIO_OUT
DO not use Microchip EEPROM for U9
Reset
Audio Block CVBS Block RGB Block
HDCP KEY
I2C address at A4
LINE IN LINE OUT
DIF BLOCK
GPIO PULL-UP
USB Block
IC Configuration Selection
C
67
100n C
67
100n
1 2
R194
1
M
R194
1
M
1
2
C113
10n
C113
10n
C114 100n C114 100n
1 2
C1
2
0
22
0P
C1
2
0
22
0P
1 2
C158 100n C158 100n
1 2
R184
0
R
R184
0
R
1
2
R13
4
.
7
K
R13
4
.
7
K
1
2
C54 100n C54 100n
1 2
R153 4
7
K
R153 4
7
K
1 2
R1
2
9
1K R1
2
9
1K 1 2
R1
7
5
4.
7
K
R1
7
5
4.
7
K
1
2
R11
4
.
7
K
R11
4
.
7
K
1
2
R15
7
0R
R15
7
0R
1
2
C115 100n C115 100n
1 2
C81
1
u
C81
1
u
1
2
R48 4.
7
K
R48 4.
7
K
1 2
RGB Inx3
CVBS Inx6
Audio In/Out
Front End
I2S IN/OUT
SPDIF
U
7
D
M
S
D318QT
RGB Inx3
CVBS Inx6
Audio In/Out
Front End
I2S IN/OUT
SPDIF
U
7
D
M
S
D318QT
RIN0M
K1
RIN0P
K
2
GIN0M
J3
GIN0P
J
2
BIN0M
H
2
BIN0P
H1
S
OGIN0
H3
H
S
YNC0
N4
VS
YNC0
N5
RIN1M
M3
RIN1P
N
2
GIN1M
K3
GIN1P
L1
BIN1M
L3
BIN1P
M
2
S
OGIN1
L
2
H
S
YNC1
R4
VS
YNC1
P
6
RIN
2
M
R
2
RIN
2
P
R3
GIN
2
M
N1
GIN
2
P
N3
BIN
2
M
P
2
BIN
2
P
P3
S
OGIN
2
P1
V
COM0
U1
C
V
B
S
0P
U3
C
V
B
S
1P
U
2
C
V
B
S2
P
T3
C
V
B
S
3P
T4
C
V
B
S
4P
T1
C
V
B
S
5P
T
2
C
V
B
S
_OUT1
R5
LINE_IN_0L
AA
3
LINE_IN_0R
Y3
LINE_IN_1L
W
2
LINE_IN_1R
W1
LINE_IN_
2
L
AA2
LINE_IN_
2
R
W3
LINE_IN_3L
Y
2
LINE_IN_3R
Y1
LINE_IN_4L
V
4
LINE_IN_4R
W4
LINE_OUT_0L
V
5
LINE_OUT_0R
W5
E
A
RPHONE_OUTL
U
6
E
A
RPHONE_OUTR
T
6
LINE_OUT_1L
U5
LINE_OUT_1R
V6
V
RP
T
7
VA
G
U
7
V
RM
U8
IP
W
7
IM
Y8
V
IFP
W8
V
IFM
Y9
SS
IF/
S
IFP
AA
9
SS
IF/
S
IFM
W9
IF
A
GC
AA6
RF_T
A
GC
Y
6
TGPIO0/UPG
A
IN
Y
7
TGPIO1/DNG
A
IN
V7
TGPIO
2
/ I
2
C_CLK
AA7
TGPIO3/ I
2
C_
S
D
A
W
6
I
2S
_IN_BCK
P4
I
2S
_IN_
S
D
P5
I
2S
_IN_W
S
L4
I
2S
_OUT_BCK
F5
I
2S
_OUT_MCK
H5
I
2S
_OUT_W
S
F
6
I
2S
_OUT_
S
D
G
6
I
2S
_OUT_
S
D1
L5
I
2S
_OUT_
S
D
2
L
6
I
2S
_OUT_
S
D3
D4
S
PDIF IN
M5
S
PDIF OUT
C
6
C8
2
100n C8
2
100n
1 2
R
2
00
4.
7
K
R
2
00
4.
7
K
1
2
D
2
0
B
AV
99
D
2
0
B
AV
99
3
2
1
C11
7
22
0P
C11
7
22
0P
1 2
R40
22
R
R40
22
R
C133 100nC133 100n
1 2
R14
7
4.
7
K
R14
7
4.
7
K
1
2
C
7
0
100n C
7
0
100n
1 2
R
2
83
100R
R
2
83
100R
1
2
R3
2
100R
R3
2
100R
C159 100n C159 100n 1 2
7 5 3 1
8 6 4 2 RP19 22
RX4
7 5 3 1
8 6 4 2 RP19 22
RX4
7
8
5
6
3
4
1
2
C1
66
100n C1
66
100n 1 2
R1
6
04
.
7
K
R1
6
04
.
7
K
1
2
R
2
0
2
1K R
2
0
2
1K 1 2
L10 10R/500
mA
L10 10R/500
mA
1
2
R51
4
.
7
K
R51
4
.
7
K
1
2
C118 1u C118 1u
C1
26
22
0P
C1
26
22
0P
1 2
R11
2
10K_1% R11
2
10K_1%
1
2
R145
22
0R
R145
22
0R
C1
67
100n C1
67
100n 1 2
R59
4
.
7
K
R59
4
.
7
K
1
2
C
6
0
1u C
6
0
1u
R
2
5
22
R
R
2
5
22
R
R14
2
10K
R14
2
10K
1
2
R15
2
100R
R15
2
100R
1
2
R13
6
1K R13
6
1K
1 2
R
2
8
7
4.
7
K
R
2
8
7
4.
7
K
1 2
LVDS GPIO
U
7
B
M
S
D318QT
LVDS GPIO
U
7
B
M
S
D318QT
R_ODD
7
/LB0P/RL
V6
P
T
2
0
R_ODD
6
/LB0N/RL
V6
N
T
2
1
R_ODD5/LB1P/RL
V7
P
U
2
0
R_ODD4/LB1N/RL
V7
N
T19
R_ODD3/LB
2
P/RL
V
8P
V2
0
R_ODD
2
/LB
2
N/RL
V
8N
U19
R_ODD1/LBCKP/LL
V
0P
V
19
R_ODD0/LBCKN/LL
V
0N
V2
1
G_ODD
7
/LB3P/LL
V
1P
W
2
0
G_ODD
6
/LB3N/LL
V
1N
W
2
1
G_ODD5/LB4P/LL
V2
P
Y
2
0
G_ODD4/LB4N/LL
V2
N
Y
2
1
G_ODD3/L
A
0P/LL
V
3P
Y19
G_ODD
2
/L
A
0N/LL
V
3N
AA2
0
G_ODD1/L
A
1P/LL
V
4P
W19
G_ODD0/L
A
1N/LL
V
4N
AA
19
B_ODD
7
/L
A2
P/LL
V
5P
Y18
B_ODD
6
/L
A2
N/LL
V
5N
AA
18
B_ODD5/L
A
CKP/LL
V6
P
Y1
7
B_ODD4/L
A
CKN/LL
V6
N
W18
B_ODD3/L
A
3P/LL
V7
P
Y1
6
B_ODD
2
/L
A
3N/LL
V7
N
W1
7
B_ODD1/L
A
4P/LL
V
8P
W1
6
B_ODD0/L
A
4N/LL
V
8N
AA
1
6
L
VS
YNC
T1
2
LH
S
YNC
U1
2
LDE
T13
LCK
U13
TE
S
TPIN
R10
C134 100n C134 100n
1 2
R141 100K R141 100K
1 2
R1
66
NC/1K R1
66
NC/1K 1 2
C4
6
10u C4
6
10u
1 2
R155
0
R
R155
0
R
1
2
U10
E
N
2
5Q3
2
U10
E
N
2
5Q3
2
CE#
1
S
O
2
WP#
3
VSS
4
S
I
5
S
CK
6
HOLD#
7
V
DD
8
DDR2 16bit
U
7A
M
S
D318QT
DDR2 16bit
U
7A
M
S
D318QT
M
V
REF
J1
7
P
A
D_IO[0](
A
-
A
D13)
A7
P
A
D_IO[4](
A
-
A
D8)
C8
P
A
D_IO[
6
](
A
-
A
D
6
)
B8
P
A
D_IO[
2
](
A
-
A
D11)
B
7
P
A
D_IO[3](
A
-
A
D4)
C9
P
A
D_IO[
7
](
A
-C
AS
)
C10
P
A
D_IO[8](
A
-
A
D0)
A
9
P
A
D_IO[5](
A
-
A
D
2
)
B9
P
A
D_IO[11](
A
-ODT)
B10
P
A
D_IO[9](
A
-R
AS
)
A
10
P
A
D_IO[1
2
](
A
-CLK+)
B11
P
A
D_IO[10](
A
-CLK-)
C11
P
A
D_IO[15](
A
-DQ
2
)
A
1
2
P
A
D_IO[13](
A
-DQ5)
B1
2
P
A
D_IO[1
7
](
A
-DQ
7
)
A
13
P
A
D_IO[14](
A
-DQ0)
C13
P
A
D_IO[19](
A
-DQ10)
C14
P
A
D_IO[1
6
](
A
-DQ13)
B13
P
A
D_IO[
2
0](
A
-DQ15)
C15
P
A
D_IO[18](
A
-DQ8)
B14
P
A
D_IO[
2
1](
A
-UDQ
S
P)
C1
6
P
A
D_IO[
22
](
A
-UDQ
S
M)
A
15
P
A
D_IO[
2
3](
A
-LDQ
S
P)
B1
6
P
A
D_IO[
27
](
A
-DQ14)
B18
P
A
D_IO[
2
5](
A
-UDQM)
C18
P
A
D_IO[
26
](
A
-LDQM)
B1
7
P
A
D_IO[
2
9](
A
-DQ9)
A
18
P
A
D_IO[30](
A
-DQ11)
A
19
P
A
D_IO[31](
A
-DQ
6
)
B19
P
A
D_IO[
2
8](
A
-DQ1
2
)
C19
P
A
D_IO[3
2
](
A
-DQ1)
A2
0
P
A
D_IO[3
6
](
A
-WEZ)
C
2
1
P
A
D_IO[34](
A
-DQ4)
B
2
1
P
A
D_IO[33](
A
-DQ3)
B
2
0
P
A
D_IO[38](
A
-B
A
1)
D
2
1
P
A
D_IO[3
7
](
A
-CKE)
D19
P
A
D_IO[40](
A
-B
A2
)
E19
P
A
D_IO[39](
A
-B
A
0)
D
2
0
P
A
D_IO[4
2
](
A
-
A
D10)
F19
P
A
D_IO[41](
A
-
A
D1)
E
2
0
P
A
D_IO[44](
A
-
A
D3)
F
2
1
P
A
D_IO[4
6
](
A
-
A
D9)
G19
P
A
D_IO[43](
A
-
A
D5)
F
2
0
P
A
D_IO[35](
A
-
A
D1
2
)
G
2
0
P
A
D_IO[45](
A
-
A
D
7
)
G
2
1
P
A
D_IO[
2
4](
A
-LDQ
S
M)
A
1
6
PM Domain HDMI Inx3
USB Hostx2
Parallel Flash
PWM
Debug Port
GPIO
I2C-Master
XTAL
U
7
C
M
S
D318QT
PM Domain HDMI Inx3
USB Hostx2
Parallel Flash
PWM
Debug Port
GPIO
I2C-Master
XTAL
U
7
C
M
S
D318QT
S
PI_C
S
Z
A
3
S
PI_DO
C4
S
PI_DI
A
4
S
PI_CK
B4
GPIO_PM
2
T10
GPIO_PM3
T9
GPIO_PM4
G5
GPIO_PM
7
T8
GPIO_PM1
V
9
A
_RX0N
E3
A
_RX0P
F
2
A
_RX1N
F3
A
_RX1P
G
2
A
_RX
2
N
G1
A
_RX
2
P
G3
A
_RXCN
E1
A
_RXCP
E
2
DDCD
A
_CK
K
6
DDCD
A
_D
A
G4
HOTPLUG
A
J5
B_RX0N
B3
B_RX0P
C
2
B_RX1N
C3
B_RX1P
D
2
B_RX
2
N
D1
B_RX
2
P
D3
B_RXCN
B1
B_RXCP
B
2
DDCDB_CK
A2
DDCDB_D
A
D5
HOTPLUGB
D
6
C_RX0N
Y1
2
C_RX0P
AA
1
2
C_RX1N
W1
2
C_RX1P
AA
13
C_RX
2
N
Y13
C_RX
2
P
W13
C_RXCN
Y11
C_RXCP
W11
DDCDC_CK
Y10
DDCDC_D
A
W10
HOTPLUGC
AA
10
SA
R0
E4
SA
R1
B
6
SA
R
2
E5
SA
R3
J
6
IRIN
A6
RE
S
ET
C
7
CEC
K4
DM_P0
B5
DP_P0
C5
DM_P1
Y14
DP_P1
W14
PF_
A
LE
P19
PF_CE0Z
N19
PF_CE1Z
P
2
0
PF_OEZ
N
2
0
PF_WEZ
R
2
0
PF_RBZ
N
2
1
N
A
ND_IO_0
K
2
1
N
A
ND_IO_1
K
2
0
N
A
ND_IO_
2
K19
N
A
ND_IO_3
L
2
0
N
A
ND_IO_4
L19
N
A
ND_IO_5
M
2
0
N
A
ND_IO_
6
M
2
1
N
A
ND_IO_
7
M19
PF_OND_
A
0
V
15
PF_OND_
A
1
V
1
7
PF_OND_
A2
R1
6
PF_OND_
A
3
R18
PF_OND_
A
4
V
1
6
PF_OND_
A
5
V
18
PF_OND_
A6
N1
6
PF_OND_
A7
R1
7
PF_OND_
A
8
M1
6
PF_OND_
A
9
N1
7
PF_OND_
A
10
P1
6
PF_OND_
A
11
P1
7
PF_OND_
A
1
2
L1
7
PF_OND_
A
13
T15
PF_OND_
A
14
U15
N
A
ND_WPZ/PF_OND_
A
15
R
2
1
PF_OND_D8
L1
6
PF_OND_D9
K1
6
PF_OND_D10
K1
7
PF_OND_D11
M18
PF_OND_D1
2
M1
7
PF_OND_D13
R19
PF_OND_D14
K18
PF_OND_D15
N18
PWM0
W15
PWM1
Y15
PWM
2
AA
15
PWM3
V
13
DDCR_D
A
U14
DDCR_CK
T14
XT
A
L_OUT
AA
5
XT
A
L_IN
Y5
DDC
A
_D
A
N
6
DDC
A
_CK
M
6
GPIO0(U
A
RT_TX1)
H
6
GPIO1(U
A
RT_RX1)
H4
GPIO
2
K5
GPIO_PM5
U10
GPIO_PM0
U9
GPIO_PM
6
V
10
R151
4
.
7
K
R151
4
.
7
K
1
2
C14
2
27
p
C14
2
27
p
1 2
L15 10R/500
mA
L15 10R/500
mA
1
2
C
6
5
100n C
6
5
100n
1 2
Y1 2
4MHZ
Y1 2
4MHZ
1
2
3
R1
7
00
R
R1
7
00
R
1
2
R158 100K R158 100K 1 2
PWR/GND
U
7
E
M
S
D318QT
PWR/GND
U
7
E
M
S
D318QT
AV
DD_DDR
2
H19
AV
DD_DDR3
H
2
0
AV
DD_DDR4
H
2
1
AV
DD_DDR
6
J19
AV
DD_DDR
7
J
2
0
AV
DD_DDR8
J
2
1
AV
DD3.3
V
_MEMPLL1
F1
6
AV
DD3.3
V
_MEMPLL
2
G1
6
AV
DD_DDR9
F18
V
DDP3.3
V
1
F1
7
V
DDP3.3
V2
G1
7
AV
DD_DDR10
G18
AV
DD
2
.5
V
_
A
DCB1
K8
AV
DD
2
.5
V
_
A
DCB
2
K9
AV
DD
2
.5
V
_
A
U
L9
AV
DD
2
.5
V
_REF_De
m
od
L8
AV
DD
2
.5
V
_MOD1
M8
AV
DD3.3
V
_
A
DC
D
7
AV
DD3.3
V
_D
V
I1
D8
AV
DD3.3
V
_D
V
I3
F
7
AV
DD3.3
V
_DMPLL
E
7
AV
DD3.3
V
_D
V
I
2
E8
AV
DD_
A
U331
G
7
AV
DD_E
A
R33
F8
VSS
5
D10
VSS6
D11
VSS7
D1
2
VSS
8
D13
VSS
9
D14
VSS
10
E9
VSS
11
E10
VSS
1
2
E11
VSS
13
E1
2
VSS
14
E13
VSS
15
E14
VSS
1
6
F9
VSS
1
7
F10
VSS
18
F11
VSS
19
F1
2
VSS2
0
F13
VSS2
1
F14
VSS22
G9
VSS2
3
G10
VSS2
4
G11
VSS2
5
G1
2
VSS26
G13
VSS27
G14
V
DDP3.3
V
3
H1
7
VSS
34
H15
VSS
33
H14
VSS
3
2
H13
VSS
31
H1
2
VSS
30
H11
VSS2
9
H10
VSS2
8
H9
VSS
40
J14
VSS
39
J13
VSS
38
J1
2
VSS
3
7
J11
VSS
3
6
J10
VSS
35
J9
VSS
50
L10
VSS
51
L11
VSS
5
2
L1
2
VSS
53
L13
VSS
54
L14
VSS
55
L15
VSS
4
6
K1
2
VSS
4
7
K13
VSS
48
K14
VSS
49
K15
VSS
45
K11
VSS
44
K10
VSS
43
K
7
VSS
4
2
J1
6
VSS
41
J15
VSS
5
6
L
7
VSS
5
7
M11
VSS
58
M1
2
VSS
59
M13
VSS6
0
M14
VSS6
1
M15
VSS62
N10
VSS6
3
N11
VSS6
4
N1
2
VSS6
5
N13
VSS66
N14
VSS67
N15
VSS6
8
P10
VSS6
9
P11
VSS7
0
P1
2
VSS7
1
P13
VSS72
P14
VSS7
3
P15
VSS7
4
B15
VSS7
5
C
2
0
VSS76
C1
2
VSS77
C1
7
AVSS
_PG
A
M9
D
V
DD8
E18
V
DD
6
E1
7
V
DD5
E1
6
V
DD
7
E15
V
DD4
D18
V
DD3
D1
7
V
DD
2
D1
6
V
DD1
D15
AV
DD
2
.5
V
_PG
A
M10
AV
DD
2
.5
V
_MOD
2
N8
AV
DD1P
2
_
A
DC
F15
GND_EFU
S
E
D9
VSS
85
V
1
VSS
8
6
V2
VSS
1
H
7
VSS2
H8
VSS
3
J
7
VSS
4
J8
VSS
8
7
H1
6
D
V
DD_NODIE
G15
VSS
88
U4
VSS
89
V
3
VSS
90
Y4
VSS
91
AA
4
VSS7
8
T5
VSS7
9
R
6
VSS
80
R
7
VSS
81
P
7
VSS
8
2
N
7
VSS
83
M
7
VSS
84
P8
VSS
9
2
N9
VSS
93
P9
AV
DD_DDR5
J18
AV
DD_DDR1
H18
Q
2
1
390
6
Q
2
1
390
6
2
1
3
R83
10K
R83
10K
1
2
R
22
3
1K R
22
3
1K
1 2
C11
2
10n
C11
2
10n
R1
67
1K R1
67
1K
1 2
R15
6
100K R15
6
100K
1 2
C85 100n C85 100n
1 2
C11
6
1n C11
6
1n
1 2
L4
10R/500
mA
L4
10R/500
mA
1
2
R
26
100R
R
26
100R
R
2
91
4.
7
K
R
2
91
4.
7
K
1 2
C84 100n C84 100n
1 2
L1
2
10R/500
mA
L1
2
10R/500
mA
1
2
R148
22
0R
R148
22
0R
C1
22
1u C1
22
1u
R
2
04
10K R
2
04
10K
1 2
C
7
1
100n C
7
1
100n
1 2
R
2
8
6
100R
R
2
8
6
100R
1
2
C111
10uF/
2
5
V
C111
10uF/
2
5
V
1 2
R
62
4.
7
K
R
62
4.
7
K
1
2
U
2
NC/
2
4C04
U
2
NC/
2
4C04
A
0
1
A
1
2
A2
3
GND
4
S
D
A
5
S
CL
6
WP
7
V
CC
8
R80
4
.
7
K
R80
4
.
7
K
1
2
R159
4
.
7
K
R159
4
.
7
K
1
2
R50
10K
R50
10K
1
2
R18
2
100K R18
2
100K 1 2
R150
10K
R150
10K
1
2
C141 27
p
C141 27
p
1 2
C1
2
9
22
0P
C1
2
9
22
0P
1 2
R1
7
1
100K R1
7
1
100K
1 2
J
2
PH-
6A
J
2
PH-
6A
1
1
2
2
3
3
4
4
5
5
6
6
R114 10K_1% R114 10K_1%
1 2