User Guide
GD32E507R-START
10/17
4.10.
MCU
Figure 4-10. Schematic diagram of MCU
PA4
PA5
PA6
PA7
PA0
PA1
PA3
PA2
PA11
PA12
PA9
PA10
PA15
PA13
PA14
PA8
PB5
PB6
PB7
PB1
PB2
PB3
PB0
PB4
PB12
PB13
PB14
PB15
PB10
PB11
PB8
PB9
PC4
PC5
PC6
PC7
PC0
PC1
PC3
PC2
PC12
PC13
PC14
PC15
PC8
PC9
PC11
PC10
C1
50V/20pF
C2
50V/20pF
Y1
49SMD-25MHz
GND
NRST
K1
K-1102B
+3V3
GND
R6
10K
Ω
C16
50V/0.1uF
GND
C3
50V/10pF
C4
50V/10pF
Y2
32.768KHz
C5
50V/0.1uF
C6
50V/0.1uF
C7
50V/0.1uF
C8
50V/0.1uF
C9
50V/0.1uF
R3
1M
Ω
OSC32_IN
OSC32_OUT
PC14
PC15
OSC_IN
OSC_OUT
GND
+3V3
C10
50V/0.1uF
+3V3
GND
BOOT0
OSC_IN
OSC_OUT
NRST
PD2
PA15
PA13
PA14
PB3
JTDI
JTMS/SWDIO
JTCK/SWDCLK
JTDO
L_TMS/IO
L_TCK/CLK
L_TDO/SWO
L_TDI
L_TReset
GDLink
JTAG
NRST
BOOT0
60
NRST
7
OSC_IN/PD0
5
OSC_OUT/PD1
6
PA0-WKUP
14
PA1
15
PA2
16
PA3
17
PA4
20
PA5
21
PA6
22
PA7
23
PA8
41
PA9
42
PA10
43
PA11
44
PA12
45
PA13/JTMS
46
PA14/JTCK
49
PA15/JTDI
50
PB0
26
PB1
27
PB2/BOOT1
28
PB3/JTDO
55
PB4/JNTRST
56
PB5
57
PB6
58
PB7
59
PB8
61
PB9
62
PB10
29
PB11
30
PB12
33
PB13
34
PB14
35
PB15
36
PC0
8
PC1
9
PC2
10
PC3
11
PC4
24
PC5
25
PC6
37
PC7
38
PC8
39
PC9
40
PC10
51
PC11
52
PC12
53
PC13-TAMPER-RTC
2
PC14-OSC32_IN
3
PC15-OSC32_OUT
4
PD2
54
VBAT
1
VDD_1
32
VDD_2
48
VDD_3
64
VDD_4
19
VDDA
13
VSS_1
31
VSS_2
47
VSS_3
63
VSS_4
18
VSSA
12
U1
GD32E507RET6
1
2
3
4
JP4
4×1P2.54
+3V3
GND
SWD