iii
Rev NR
TABLE OF CONTENTS
EIGHT CHANNEL HIGH PERFORMANCE SERIAL I/O PCIe CARD
..................................................... I
CHAPTER 1: INTRODUCTION .............................................................................................................................. 1
1.0
G
ENERAL
D
ESCRIPTION
.................................................................................................................................. 1
1.1
Z16C30
U
NIVERSAL
S
ERIAL
C
ONTROLLER
.................................................................................................... 2
1.2
D
EEP
T
RANSMIT
/R
ECEIVE
FIFO
S
................................................................................................................... 2
1.3
M
ULTIPROTOCOL
T
RANSCEIVERS
................................................................................................................... 3
1.4
PMC/PCI
I
NTERFACE
..................................................................................................................................... 3
1.5
G
ENERAL
P
URPOSE
IO ................................................................................................................................... 3
1.6
C
ONNECTOR
I
NTERFACE
................................................................................................................................ 3
1.7
N
EW
F
EATURES
.............................................................................................................................................. 3
CHAPTER 2: LOCAL SPACE REGISTERS .......................................................................................................... 4
2.0
R
EGISTER
M
AP
............................................................................................................................................... 4
2.1
GSC
F
IRMWARE
R
EGISTERS
........................................................................................................................... 4
2.1.1
F
IRMWARE
R
EVISION
:
L
OCAL
O
FFSET
0
X
0000 .............................................................................................. 5
2.1.2
B
OARD
C
ONTROL
:
L
OCAL
O
FFSET
0
X
0004 .................................................................................................... 6
2.1.3
B
OARD
S
TATUS
:
L
OCAL
O
FFSET
0
X
0008........................................................................................................ 7
2.1.4
T
IMESTAMP
:
L
OCAL
O
FFSET
0
X
000C ............................................................................................................. 7
2.1.5
C
HANNEL
TX
A
LMOST
F
LAGS
:
L
OCAL
O
FFSET
0
X
0010
/
0
X
0020
/
0
X
0030
/
0
X
0040 .................................... 7
2.1.6
C
HANNEL
RX
A
LMOST
F
LAGS
:
L
OCAL
O
FFSET
0
X
0014
/
0
X
0024
/
0
X
0034
/
0
X
0044 .................................... 8
2.1.7
C
HANNEL
FIFO:
L
OCAL
O
FFSET
0
X
0018
/
0
X
0028
/
0
X
0038
/
0
X
0048 .......................................................... 8
2.1.8
C
HANNEL
C
ONTROL
/S
TATUS
:
L
OCAL
O
FFSET
0
X
001C
/
0
X
002C
/
0
X
003C
/
0
X
004C .................................... 8
2.1.9
C
HANNEL
S
YNC
D
ETECT
B
YTE
:
L
OCAL
O
FFSET
0
X
0050
/
0
X
0054
/
0
X
0058
/
0
X
005C .................................. 9
2.1.10
I
NTERRUPT
R
EGISTERS
................................................................................................................................... 9
2.1.10.1
I
NTERRUPT
C
ONTROL
:
L
OCAL
O
FFSET
0
X
0060 .................................................................................... 10
2.1.10.2
I
NTERRUPT
S
TATUS
/C
LEAR
:
L
OCAL
O
FFSET
0
X
0064 ............................................................................ 10
2.1.10.3
I
NTERRUPT
E
DGE
/L
EVEL
:
L
OCAL
O
FFSET
0
X
0068 ............................................................................... 11
2.1.10.4
I
NTERRUPT
H
I
/L
O
:
L
OCAL
O
FFSET
0
X
006C .......................................................................................... 11
2.1.11
C
HANNEL
P
IN
S
OURCE
:
L
OCAL
O
FFSET
0
X
0080
/
0
X
0084
/
0
X
0088
/
0
X
008C ............................................ 11
2.1.12
C
HANNEL
P
IN
S
TATUS
:
L
OCAL
O
FFSET
0
X
0090
/
0
X
0094
/
0
X
0098
/
0
X
009C ............................................. 14
2.1.13
P
ROGRAMMABLE
C
LOCK
R
EGISTERS
:
L
OCAL
O
FFSET
0
X
00A0
/
0
X
00A4
/
0
X
00A8
/
0
X
AC ....................... 15
2.1.14
FIFO
C
OUNT
R
EGISTER
:
L
OCAL
O
FFSET
0
X
00D0
/
0
X
00D4
/
0
X
00D8
/
0
X
00DC ....................................... 15
2.1.15
FIFO
S
IZE
R
EGISTER
:
L
OCAL
O
FFSET
0
X
00E0
/
0
X
00E4
/
0
X
00E8
/
0
X
00EC ............................................. 15
2.1.16
FW
T
YPE
ID
R
EGISTER
:
L
OCAL
O
FFSET
0
X
00F8 ......................................................................................... 15
2.1.17
F
EATURES
R
EGISTER
:
L
OCAL
O
FFSET
0
X
00FC ............................................................................................ 16
2.2
U
NIVERSAL
S
ERIAL
C
ONTROLLER
R
EGISTERS
.............................................................................................. 16
2.2.1
USC
R
ESET
.................................................................................................................................................. 16
2.2.2
8-B
IT
USC
R
EGISTER
A
CCESS
...................................................................................................................... 17
2.2.3
USC
D
ATA
T
RANSFER
.................................................................................................................................. 17
2.2.4
USC
R
EGISTER
M
EMORY
M
AP
..................................................................................................................... 18
CHAPTER 3: PROGRAMMING ........................................................................................................................... 19
3.0
I
NTRODUCTION
............................................................................................................................................. 19
3.1
R
ESETS
......................................................................................................................................................... 19
3.2
FIFO
S
........................................................................................................................................................... 19
3.2.1
FIFO
F
LAGS
................................................................................................................................................. 19
3.2.2
FIFO
C
OUNTERS
.......................................................................................................................................... 20
