GE H
EALTHCARE
D
IRECTION
FC091194, R
EVISION
11
V
IVID
7 S
ERVICE
M
ANUAL
5 - 14
Section 5-3 - a Front-End Processor (FEP)
5-3-10
Transmitter Board, TX128-5 (version introduced for BT’05)
5-3-10-1
General Description
The Transmitter board (TX128) contains 128 individually controlled transmit channels and provides
transmit pulses via the XDBUS board to the Relay board and then to the transducer array (the probes).
Frequency-, delay- and pulswidth parameters for the TX128 board are received on the FE_BUS from
the Radio Frequency Interface (RFI). The parameters are decoded and stored in the cache.
A pulse, TX_TRIG_L, trigs the Transmit Pulse Generators. The transmit pulses are then amplified to the
correct level in the 128 TX transmitters.
High Voltage 1 and High Voltage 2 from the TX Power supplies the TX Transmitters with the needed
voltages to generate the correct power.
The VDRIVER voltage is used by the TX Drivers (drivers for the TX transmitters).
Two TX128 boards are used on units with the 3D option.
Figure 5-10 Block Diagram for the TX128 board
8
TRANSMIT
(128 CH.)
TX
128
TRANSMITTERS
CACHE
FRONT END
INTERFACE
PULSE
GEN.
FROM TX POWER
HV1&2
TX_TRIG_L
FROM RFI
FE_BUS
XD1-128
TO RLY VIA XDBUS
HV1P
HV2P
HV2N
HV1N
VDRIVER
FROM DC POWER
FROM RFI
Содержание Vivid 7
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